dts/upstream/src/mips/qca/ar9132.dtsi

// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/ath79-clk.h>

/ {
	compatible = "qca,ar9132";

	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "mips,mips24Kc";
			clocks = <&pll ATH79_CLK_CPU>;
			reg = <0>;
		};
	};

	cpuintc: interrupt-controller {
		compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";

		interrupt-controller;
		#interrupt-cells = <1>;

		qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
		qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
					<&ddr_ctrl 0>, <&ddr_ctrl 1>;
	};

	ahb {
		compatible = "simple-bus";
		ranges;

		#address-cells = <1>;
		#size-cells = <1>;

		interrupt-parent = <&cpuintc>;

		apb {
			compatible = "simple-bus";
			ranges;

			#address-cells = <1>;
			#size-cells = <1>;

			interrupt-parent = <&miscintc>;

			ddr_ctrl: memory-controller@18000000 {
				compatible = "qca,ar9132-ddr-controller",
						"qca,ar7240-ddr-controller";
				reg = <0x18000000 0x100>;

				#qca,ddr-wb-channel-cells = <1>;
			};

			uart: uart@18020000 {
				compatible = "ns8250";
				reg = <0x18020000 0x20>;
				interrupts = <3>;

				clocks = <&pll ATH79_CLK_AHB>;
				clock-names = "uart";

				reg-io-width = <4>;
				reg-shift = <2>;
				no-loopback-test;

				status = "disabled";
			};

			gpio: gpio@18040000 {
				compatible = "qca,ar9132-gpio",
						"qca,ar7100-gpio";
				reg = <0x18040000 0x30>;
				interrupts = <2>;

				ngpios = <22>;

				gpio-controller;
				#gpio-cells = <2>;

				interrupt-controller;
				#interrupt-cells = <2>;
			};

			pll: pll-controller@18050000 {
				compatible = "qca,ar9132-pll",
						"qca,ar9130-pll";
				reg = <0x18050000 0x20>;

				clock-names = "ref";
				/* The board must provides the ref clock */

				#clock-cells = <1>;
				clock-output-names = "cpu", "ddr", "ahb";
			};

			wdt: wdt@18060008 {
				compatible = "qca,ar7130-wdt";
				reg = <0x18060008 0x8>;

				interrupts = <4>;

				clocks = <&pll ATH79_CLK_AHB>;
				clock-names = "wdt";
			};

			miscintc: interrupt-controller@18060010 {
				compatible = "qca,ar9132-misc-intc",
					   "qca,ar7100-misc-intc";
				reg = <0x18060010 0x8>;

				interrupt-parent = <&cpuintc>;
				interrupts = <6>;

				interrupt-controller;
				#interrupt-cells = <1>;
			};

			rst: reset-controller@1806001c {
				compatible = "qca,ar9132-reset",
						"qca,ar7100-reset";
				reg = <0x1806001c 0x4>;

				#reset-cells = <1>;
			};
		};

		usb: usb@1b000100 {
			compatible = "qca,ar7100-ehci", "generic-ehci";
			reg = <0x1b000100 0x100>;

			interrupts = <3>;
			resets = <&rst 5>;

			has-transaction-translator;

			phy-names = "usb";
			phys = <&usb_phy>;

			status = "disabled";
		};

		spi: spi@1f000000 {
			compatible = "qca,ar9132-spi", "qca,ar7100-spi";
			reg = <0x1f000000 0x10>;

			clocks = <&pll ATH79_CLK_AHB>;
			clock-names = "ahb";

			status = "disabled";

			#address-cells = <1>;
			#size-cells = <0>;
		};
	};

	usb_phy: usb-phy {
		compatible = "qca,ar7100-usb-phy";

		reset-names = "phy", "suspend-override";
		resets = <&rst 4>, <&rst 3>;

		#phy-cells = <0>;

		status = "disabled";
	};
};