Masami Hiramatsu | 7c74127 | 2021-06-04 18:45:10 +0900 | [diff] [blame] | 1 | .. SPDX-License-Identifier: GPL-2.0+ |
| 2 | |
| 3 | Introduction |
| 4 | ============ |
| 5 | |
| 6 | DeveloperBox is a certified 96boards Enterprise Edition board. The board/SoC has: - |
| 7 | |
| 8 | * Socionext SC2A11 24-cores ARM Cortex-A53 on tbe Mini-ATX form factor motherboard |
| 9 | * 4 DIMM slots (4GB DDR4-2400 UDIMM shipped by default) |
| 10 | * 1 4xPCIe Gen2 slot and 2 1xPCIe Gen2 slots |
| 11 | (1x slots are connected via PCIe bridge chip) |
| 12 | * 4 USB-3.0 ports |
| 13 | * 2 SATA ports |
| 14 | * 1 GbE network port |
| 15 | * 1 USB-UART serial port (micro USB) |
| 16 | * 64MB SPI NOR Flash |
| 17 | * 8GB eMMC Flash Storage |
| 18 | * 96boards LS connector |
| 19 | |
| 20 | The DeveloperBox schematic can be found here: - |
| 21 | https://www.96boards.org/documentation/enterprise/developerbox/hardware-docs/mzsc2am_v03_20180115_a.pdf |
| 22 | |
| 23 | And the other documents can be found here: - |
| 24 | https://www.96boards.org/documentation/enterprise/developerbox/ |
| 25 | |
| 26 | |
| 27 | Currently, the U-Boot port supports: - |
| 28 | |
| 29 | * USB |
| 30 | * eMMC |
| 31 | * SPI-NOR |
| 32 | * SATA |
| 33 | * GbE |
| 34 | |
| 35 | The DeveloperBox boots the TF-A and EDK2 as a main bootloader by default. |
| 36 | The DeveloperBox U-Boot port will replace the EDK2 and boot from TF-A as |
| 37 | BL33, but no need to combine with it. |
| 38 | |
| 39 | Compile from source |
| 40 | =================== |
| 41 | |
| 42 | You can build U-Boot without any additinal source code.:: |
| 43 | |
| 44 | cd u-boot |
Masahisa Kojima | 5bf0304 | 2023-10-25 15:51:02 +0900 | [diff] [blame] | 45 | git checkout v2023.07 |
Masami Hiramatsu | 7c74127 | 2021-06-04 18:45:10 +0900 | [diff] [blame] | 46 | export ARCH=arm64 |
| 47 | export CROSS_COMPILE=aarch64-linux-gnu- |
Masahisa Kojima | 5bf0304 | 2023-10-25 15:51:02 +0900 | [diff] [blame] | 48 | make synquacer_developerbox_defconfig |
Masami Hiramatsu | 7c74127 | 2021-06-04 18:45:10 +0900 | [diff] [blame] | 49 | make -j `noproc` |
| 50 | |
| 51 | Then, expand the binary to 1MB for preparing flash.:: |
| 52 | |
| 53 | cp u-boot.bin SPI_NOR_UBOOT.fd |
| 54 | truncate -s 1M SPI_NOR_UBOOT.fd |
| 55 | |
| 56 | Installation |
| 57 | ============ |
| 58 | |
| 59 | You can install the SNI_NOR_UBOOT.fd via NOR flash writer. |
| 60 | |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 61 | Flashing the U-Boot image on DeveloperBox requires a 96boards UART mezzanine |
| 62 | or other mezzanine which can connect to the LS-UART0 port. |
| 63 | Connect USB cable from host to the LS-UART0 and set DSW2-7 to ON, and turn the |
| 64 | board on again. The flash writer program will be started automatically; |
| 65 | don't forget to turn the DSW2-7 off again after flashing. |
Masami Hiramatsu | 7c74127 | 2021-06-04 18:45:10 +0900 | [diff] [blame] | 66 | |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 67 | *!!CAUTION!! If you write the U-Boot image on wrong address, the board can |
| 68 | be bricked. See below page if you need to recover the bricked board. See |
| 69 | the following page for more details* |
Masami Hiramatsu | 7c74127 | 2021-06-04 18:45:10 +0900 | [diff] [blame] | 70 | |
| 71 | https://www.96boards.org/documentation/enterprise/developerbox/installation/board-recovery.md.html |
| 72 | |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 73 | When the serial flasher is running correctly it will show the following boot |
| 74 | messages printed to the LS-UART0 console:: |
Masami Hiramatsu | 7c74127 | 2021-06-04 18:45:10 +0900 | [diff] [blame] | 75 | |
| 76 | |
| 77 | /*------------------------------------------*/ |
| 78 | /* SC2A11 "SynQuacer" series Flash writer */ |
| 79 | /* */ |
| 80 | /* Version: cd254ac */ |
| 81 | /* Build: 12/15/17 11:25:45 */ |
| 82 | /*------------------------------------------*/ |
| 83 | |
| 84 | Command Input > |
| 85 | |
| 86 | Once the flasher tool is running we are ready flash the UEFI image:: |
| 87 | |
| 88 | flash rawwrite 200000 100000 |
| 89 | >> Send SPI_NOR_UBOOT.fd via XMODEM (Control-A S in minicom) << |
| 90 | |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 91 | *!!NOTE!! The flasher command parameter is different from the command for |
| 92 | board recovery. U-Boot uses the offset 200000 (2-five-0, 2M in hex) and the |
| 93 | size 100000 (1-five-0, 1M in hex).* |
Masami Hiramatsu | 7c74127 | 2021-06-04 18:45:10 +0900 | [diff] [blame] | 94 | |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 95 | After transferring the SPI_NOR_UBOOT.fd, turn off the DSW2-7 and |
| 96 | reset the board. |
| 97 | |
| 98 | |
| 99 | Enable FWU Multi Bank Update |
| 100 | ============================ |
| 101 | |
| 102 | DeveloperBox supports the FWU Multi Bank Update. You *MUST* update both |
| 103 | *SCP firmware* and *TF-A* for this feature. This will change the layout and |
| 104 | the boot process but you can switch back to the normal one by changing |
| 105 | the DSW 1-4 off. |
| 106 | |
| 107 | Configure U-Boot |
| 108 | ---------------- |
| 109 | |
| 110 | To enable the FWU Multi Bank Update on the DeveloperBox board the |
| 111 | configs/synquacer_developerbox_defconfig enables default FWU configuration :: |
| 112 | |
| 113 | CONFIG_FWU_MULTI_BANK_UPDATE=y |
| 114 | CONFIG_FWU_MDATA=y |
| 115 | CONFIG_FWU_MDATA_MTD=y |
| 116 | CONFIG_FWU_NUM_BANKS=2 |
| 117 | CONFIG_FWU_NUM_IMAGES_PER_BANK=1 |
| 118 | CONFIG_CMD_FWU_METADATA=y |
Sughosh Ganu | 4e6f8d8 | 2024-03-22 16:27:31 +0530 | [diff] [blame] | 119 | CONFIG_FWU_MDATA_V2=y |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 120 | |
| 121 | And build it:: |
| 122 | |
| 123 | cd u-boot/ |
| 124 | export ARCH=arm64 |
| 125 | export CROSS_COMPILE=aarch64-linux-gnu- |
| 126 | make synquacer_developerbox_defconfig |
| 127 | make -j `noproc` |
| 128 | cd ../ |
| 129 | |
| 130 | By default, the CONFIG_FWU_NUM_BANKS and CONFIG_FWU_NUM_IMAGES_PER_BANKS are |
| 131 | set to 2 and 1 respectively. This uses FIP (Firmware Image Package) type image |
| 132 | which contains TF-A, U-Boot and OP-TEE (the OP-TEE is optional). |
Sughosh Ganu | 4e6f8d8 | 2024-03-22 16:27:31 +0530 | [diff] [blame] | 133 | You can use fiptool to compose the FIP image from those firmware |
| 134 | images. There are two versions of the FWU metadata, of which the |
| 135 | platform enables version 2 by default. |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 136 | |
| 137 | Rebuild SCP firmware |
| 138 | -------------------- |
| 139 | |
| 140 | Rebuild SCP firmware which supports FWU Multi Bank Update as below:: |
| 141 | |
| 142 | cd SCP-firmware/ |
| 143 | OUT=./build/product/synquacer |
| 144 | ROMFW_FILE=$OUT/scp_romfw/$SCP_BUILD_MODE/bin/scp_romfw.bin |
| 145 | RAMFW_FILE=$OUT/scp_ramfw/$SCP_BUILD_MODE/bin/scp_ramfw.bin |
| 146 | ROMRAMFW_FILE=scp_romramfw_release.bin |
| 147 | |
| 148 | make CC=arm-none-eabi-gcc PRODUCT=synquacer MODE=release |
| 149 | tr "\000" "\377" < /dev/zero | dd of=${ROMRAMFW_FILE} bs=1 count=196608 |
| 150 | dd if=${ROMFW_FILE} of=${ROMRAMFW_FILE} bs=1 conv=notrunc seek=0 |
| 151 | dd if=${RAMFW_FILE} of=${ROMRAMFW_FILE} bs=1 seek=65536 |
| 152 | cd ../ |
| 153 | |
| 154 | And you can get the `scp_romramfw_release.bin` file. |
| 155 | |
| 156 | Rebuild OPTEE firmware |
| 157 | ---------------------- |
| 158 | |
| 159 | Rebuild OPTEE to use in new-layout FIP as below:: |
| 160 | |
| 161 | cd optee_os/ |
| 162 | make -j`nproc` PLATFORM=synquacer ARCH=arm \ |
| 163 | CROSS_COMPILE64=aarch64-linux-gnu- CFG_ARM64_core=y \ |
| 164 | CFG_CRYPTO_WITH_CE=y CFG_CORE_HEAP_SIZE=524288 CFG_CORE_DYN_SHM=y \ |
| 165 | CFG_CORE_ARM64_PA_BITS=48 CFG_TEE_CORE_LOG_LEVEL=1 CFG_TEE_TA_LOG_LEVEL=1 |
| 166 | cp out/arm-plat-synquacer/core/tee-pager_v2.bin ../arm-trusted-firmware/ |
| 167 | |
| 168 | The produced `tee-pager_v2.bin` is to be used while building TF-A next. |
| 169 | |
| 170 | |
| 171 | Rebuild TF-A and FIP |
| 172 | -------------------- |
| 173 | |
| 174 | Rebuild TF-A which supports FWU Multi Bank Update as below:: |
| 175 | |
| 176 | cd arm-trusted-firmware/ |
| 177 | make CROSS_COMPILE=aarch64-linux-gnu- -j`nproc` PLAT=synquacer \ |
| 178 | TRUSTED_BOARD_BOOT=1 SPD=opteed SQ_RESET_TO_BL2=1 GENERATE_COT=1 \ |
| 179 | MBEDTLS_DIR=../mbedtls BL32=tee-pager_v2.bin \ |
| 180 | BL33=../u-boot/u-boot.bin all fip fiptool |
| 181 | |
| 182 | And make a FIP image.:: |
| 183 | |
| 184 | cp build/synquacer/release/fip.bin SPI_NOR_NEWFIP.fd |
| 185 | tools/fiptool/fiptool update --tb-fw build/synquacer/release/bl2.bin SPI_NOR_NEWFIP.fd |
| 186 | |
| 187 | UUIDs for the FWU Multi Bank Update |
| 188 | ----------------------------------- |
| 189 | |
| 190 | FWU multi-bank update requires some UUIDs. The DeveloperBox platform uses |
| 191 | following UUIDs. |
| 192 | |
| 193 | - Location UUID for the FIP image: 17e86d77-41f9-4fd7-87ec-a55df9842de5 |
| 194 | - Image type UUID for the FIP image: 10c36d7d-ca52-b843-b7b9-f9d6c501d108 |
| 195 | - Image UUID for Bank0 : 5a66a702-99fd-4fef-a392-c26e261a2828 |
| 196 | - Image UUID for Bank1 : a8f868a1-6e5c-4757-878d-ce63375ef2c0 |
| 197 | |
| 198 | These UUIDs are used for making a FWU metadata image. |
| 199 | |
Sughosh Ganu | 4e6f8d8 | 2024-03-22 16:27:31 +0530 | [diff] [blame] | 200 | u-boot$ ./tools/mkfwumdata -v 2 -i 1 -b 2 \ |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 201 | 17e86d77-41f9-4fd7-87ec-a55df9842de5,10c36d7d-ca52-b843-b7b9-f9d6c501d108,5a66a702-99fd-4fef-a392-c26e261a2828,a8f868a1-6e5c-4757-878d-ce63375ef2c0 \ |
| 202 | ../devbox-fwu-mdata.img |
| 203 | |
| 204 | Create Accept & Revert capsules |
| 205 | |
| 206 | u-boot$ ./tools/mkeficapsule -A -g 7d6dc310-52ca-43b8-b7b9-f9d6c501d108 NEWFIP_accept.Cap |
| 207 | u-boot$ ./tools/mkeficapsule -R NEWFIP_revert.Cap |
| 208 | |
| 209 | Install via flash writer |
| 210 | ------------------------ |
| 211 | |
| 212 | As explained in above section, the new FIP image and the FWU metadata image |
| 213 | can be installed via NOR flash writer. |
| 214 | |
| 215 | Once the flasher tool is running we are ready to flash the images.:: |
| 216 | Write the FIP image to the Bank-0 & 1 at 6MB and 10MB offset.:: |
| 217 | |
Masahisa Kojima | 64d9338 | 2023-10-25 15:51:03 +0900 | [diff] [blame] | 218 | flash rawwrite 600000 400000 |
| 219 | flash rawwrite a00000 400000 |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 220 | >> Send SPI_NOR_NEWFIP.fd via XMODEM (Control-A S in minicom) << |
| 221 | |
| 222 | flash rawwrite 500000 1000 |
| 223 | flash rawwrite 530000 1000 |
| 224 | >> Send devbox-fwu-mdata.img via XMODEM (Control-A S in minicom) << |
| 225 | |
| 226 | And write the new SCP firmware.:: |
| 227 | |
| 228 | flash write cm3 |
| 229 | >> Send scp_romramfw_release.bin via XMODEM (Control-A S in minicom) << |
Masami Hiramatsu | 7c74127 | 2021-06-04 18:45:10 +0900 | [diff] [blame] | 230 | |
Jassi Brar | eeee432 | 2023-05-31 00:29:56 -0500 | [diff] [blame] | 231 | At last, turn on the DSW 3-4 on the board, and reboot. |
| 232 | Note that if DSW 3-4 is turned off, the DeveloperBox will boot from |
| 233 | the original EDK2 firmware (or non-FWU U-Boot if you already installed). |