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Angus Ainslie3f8667c2022-08-25 06:46:02 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018 NXP
4 * Copyright 2021 Purism
5 */
6
Angus Ainslie3f8667c2022-08-25 06:46:02 -07007#include <malloc.h>
8#include <errno.h>
9#include <asm/io.h>
10#include <miiphy.h>
11#include <asm/mach-imx/iomux-v3.h>
12#include <asm-generic/gpio.h>
13#include <asm/arch/sys_proto.h>
14#include <fsl_esdhc.h>
15#include <mmc.h>
16#include <asm/arch/imx8mq_pins.h>
17#include <asm/arch/sys_proto.h>
18#include <asm/mach-imx/gpio.h>
19#include <asm/mach-imx/mxc_i2c.h>
20#include <asm/arch/clock.h>
21#include <asm/mach-imx/video.h>
22#include <fuse.h>
23#include <i2c.h>
24#include <spl.h>
25#include <usb.h>
26#include <dwc3-uboot.h>
27#include <linux/delay.h>
28#include <linux/bitfield.h>
29#include <power/regulator.h>
30#include <usb/xhci.h>
31#include "librem5.h"
32
33DECLARE_GLOBAL_DATA_PTR;
34
35int board_early_init_f(void)
36{
37 return 0;
38}
39
40#if IS_ENABLED(CONFIG_LOAD_ENV_FROM_MMC_BOOT_PARTITION)
41uint board_mmc_get_env_part(struct mmc *mmc)
42{
Pali Roháreafdbe52023-03-11 11:44:27 +010043 uint part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
Angus Ainslie3f8667c2022-08-25 06:46:02 -070044
45 if (part == 7)
46 part = 0;
47 return part;
48}
49#endif
50
51int tps65982_wait_for_app(int timeout, int timeout_step)
52{
53 int ret;
54 char response[6];
55 struct udevice *udev, *bus;
56
57 log_debug("%s: starting\n", __func__);
58
59 /* Set the i2c bus */
60 ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus);
61 if (ret) {
62 log_err("%s: No bus %d\n", __func__, 0);
63 return 1;
64 }
65
66 ret = i2c_get_chip(bus, 0x3f, 1, &udev);
67 if (ret) {
68 log_err("%s: setting chip offset failed %d\n", __func__, ret);
69 return 1;
70 }
71
72 while (timeout > 0) {
73 ret = dm_i2c_read(udev, 0x03, (u8 *)response, 5);
74 log_debug("tps65982 mode %s\n", response);
75 if (response[1] == 'A')
76 return 0;
77 mdelay(timeout_step);
78 timeout -= timeout_step;
79 log_debug("tps65982 waited %d ms %c\n", timeout_step, response[1]);
80 }
81
82 return 1;
83}
84
85int tps65982_clear_dead_battery(void)
86{
87 int ret;
88 char cmd[5] = "\04DBfg";
89 struct udevice *udev, *bus;
90
91 log_debug("%s: starting\n", __func__);
92
93 /* Set the i2c bus */
94 ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus);
95 if (ret) {
96 log_err("%s: No bus %d\n", __func__, 0);
97 return 1;
98 }
99
100 ret = i2c_get_chip(bus, 0x3f, 1, &udev);
101 if (ret) {
102 log_err("%s: setting chip offset failed %d\n", __func__, ret);
103 return 1;
104 }
105
106 /* clearing the dead battery flag when not in dead battery condition
107 * is a no-op, so there's no need to check if it's in effect
108 */
109 ret = dm_i2c_write(udev, 0x08, cmd, 5);
110 if (ret) {
111 log_err("%s: writing 4CC command failed %d", __func__, ret);
112 return 1;
113 }
114
115 return 0;
116}
117
118#define TPS_POWER_STATUS_PWROPMODE(x) FIELD_GET(GENMASK(3, 2), x)
119
120#define TPS_PDO_CONTRACT_TYPE(x) FIELD_GET(GENMASK(31, 30), x)
121#define TPS_PDO_CONTRACT_FIXED 0
122#define TPS_PDO_CONTRACT_BATTERY 1
123#define TPS_PDO_CONTRACT_VARIABLE 2
124
125#define TPS_TYPEC_PWR_MODE_USB 0
126#define TPS_TYPEC_PWR_MODE_1_5A 1
127#define TPS_TYPEC_PWR_MODE_3_0A 2
128#define TPS_TYPEC_PWR_MODE_PD 3
129
130#define TPS_PDO_FIXED_CONTRACT_MAX_CURRENT(x) (FIELD_GET(GENMASK(9, 0), x) * 10)
131#define TPS_PDO_VAR_CONTRACT_MAX_CURRENT(x) (FIELD_GET(GENMASK(9, 0), x) * 10)
132#define TPS_PDO_BAT_CONTRACT_MAX_VOLTAGE(x) (FIELD_GET(GENMASK(29, 20), x) * 50)
133#define TPS_PDO_BAT_CONTRACT_MAX_POWER(x) (FIELD_GET(GENMASK(9, 0), x) * 250)
134
135int tps65982_get_max_current(void)
136{
137 int ret;
138 u8 buf[7];
139 u8 pwr_status;
140 u32 contract;
141 int type, mode;
142 struct udevice *udev, *bus;
143
144 log_debug("%s: starting\n", __func__);
145
146 /* Set the i2c bus */
147 ret = uclass_get_device_by_seq(UCLASS_I2C, 0, &bus);
148 if (ret) {
149 log_debug("%s: No bus %d\n", __func__, 0);
150 return -1;
151 }
152
153 ret = i2c_get_chip(bus, 0x3f, 1, &udev);
154 if (ret) {
155 log_debug("%s: setting chip offset failed %d\n", __func__, ret);
156 return -1;
157 }
158
159 ret = dm_i2c_read(udev, 0x3f, buf, 3);
160 if (ret) {
161 log_debug("%s: reading pwr_status failed %d\n", __func__, ret);
162 return -1;
163 }
164
165 pwr_status = buf[1];
166
167 if (!(pwr_status & 1))
168 return 0;
169
170 mode = TPS_POWER_STATUS_PWROPMODE(pwr_status);
171 switch (mode) {
172 case TPS_TYPEC_PWR_MODE_1_5A:
173 return 1500;
174 case TPS_TYPEC_PWR_MODE_3_0A:
175 return 3000;
176 case TPS_TYPEC_PWR_MODE_PD:
177 ret = dm_i2c_read(udev, 0x34, buf, 7);
178 if (ret) {
179 log_debug("%s: reading active contract failed %d\n", __func__, ret);
180 return -1;
181 }
182
183 contract = buf[1] + (buf[2] << 8) + (buf[3] << 16) + (buf[4] << 24);
184
185 type = TPS_PDO_CONTRACT_TYPE(contract);
186
187 switch (type) {
188 case TPS_PDO_CONTRACT_FIXED:
189 return TPS_PDO_FIXED_CONTRACT_MAX_CURRENT(contract);
190 case TPS_PDO_CONTRACT_BATTERY:
191 return 1000 * TPS_PDO_BAT_CONTRACT_MAX_POWER(contract)
192 / TPS_PDO_BAT_CONTRACT_MAX_VOLTAGE(contract);
193 case TPS_PDO_CONTRACT_VARIABLE:
194 return TPS_PDO_VAR_CONTRACT_MAX_CURRENT(contract);
195 default:
196 log_debug("Unknown contract type: %d\n", type);
197 return -1;
198 }
199 case TPS_TYPEC_PWR_MODE_USB:
200 return 500;
201 default:
202 log_debug("Unknown power mode: %d\n", mode);
203 return -1;
204 }
205}
206
207int init_tps65982(void)
208{
209 log_debug("%s: starting\n", __func__);
210
211 if (tps65982_wait_for_app(500, 100)) {
212 log_err("tps65982 APP boot failed\n");
213 return 1;
214 }
215
216 log_info("tps65982 boot successful\n");
217 return 0;
218}
219
220int bq25895_set_iinlim(int current)
221{
222 u8 val, iinlim;
223 int ret;
224 struct udevice *udev, *bus;
225
226 /* Set the i2c bus */
227 ret = uclass_get_device_by_seq(UCLASS_I2C, 3, &bus);
228 if (ret) {
229 log_err("%s: No bus 3\n", __func__);
230 return ret;
231 }
232
233 ret = i2c_get_chip(bus, 0x6a, 1, &udev);
234 if (ret) {
235 log_err("%s: setting chip offset failed %d\n", __func__, ret);
236 return ret;
237 }
238
239 if (current > 3250)
240 current = 3250;
241 if (current < 100)
242 current = 100;
243
244 val = dm_i2c_reg_read(udev, 0x00);
245 iinlim = ((current - 100) / 50) & 0x3f;
246 val = (val & 0xc0) | iinlim;
247 dm_i2c_reg_write(udev, 0x00, val);
248 log_debug("REG00 0x%x\n", val);
249
250 return 0;
251}
252
253bool bq25895_battery_present(void)
254{
255 u8 val;
256 int ret;
257 struct udevice *udev, *bus;
258
259 /* Set the i2c bus */
260 ret = uclass_get_device_by_seq(UCLASS_I2C, 3, &bus);
261 if (ret) {
262 log_err("%s: No bus 3\n", __func__);
263 return ret;
264 }
265
266 ret = i2c_get_chip(bus, 0x6a, 1, &udev);
267 if (ret) {
268 log_err("%s: setting chip offset failed %d\n", __func__, ret);
269 return ret;
270 }
271
272 /* note that this may return false negatives when there's
273 * no external power applied and the battery voltage is below
274 * Vsys. this isn't a problem when used for clearing the dead
275 * battery flag though, since it's certain that there's an external
276 * power applied in this case
277 */
278 val = dm_i2c_reg_read(udev, 0x0e) & 0x7f;
279 if (val == 0x00 || val == 0x7f)
280 return false;
281
282 return true;
283}
284
285/*
286 * set some safe defaults for the battery charger
287 */
288int init_charger_bq25895(void)
289{
290 u8 val;
291 int iinlim, ret;
292 struct udevice *udev, *bus;
293
294 /* Set the i2c bus */
295 ret = uclass_get_device_by_seq(UCLASS_I2C, 3, &bus);
296 if (ret) {
297 log_debug("%s: No bus 3\n", __func__);
298 return ret;
299 }
300
301 ret = i2c_get_chip(bus, 0x6a, 1, &udev);
302 if (ret) {
303 log_debug("%s: setting chip offset failed %d\n", __func__, ret);
304 return ret;
305 }
306
307 val = dm_i2c_reg_read(udev, 0x0b);
308 log_debug("REG0B 0x%x\n", val);
309
310 log_debug("VBUS_STAT 0x%x\n", val >> 5);
311 switch (val >> 5) {
312 case 0:
313 log_debug("VBUS not detected\n");
314 break;
315 case 1:
316 log_debug("USB SDP IINLIM 500mA\n");
317 break;
318 case 2:
319 log_debug("USB CDP IINLIM 1500mA\n");
320 break;
321 case 3:
322 log_debug("USB DCP IINLIM 3500mA\n");
323 break;
324 case 4:
325 log_debug("MAXCHARGE IINLIM 1500mA\n");
326 break;
327 case 5:
328 log_debug("Unknown IINLIM 500mA\n");
329 break;
330 case 6:
331 log_debug("DIVIDER IINLIM > 1000mA\n");
332 break;
333 case 7:
334 log_debug("OTG\n");
335 break;
336 };
337
338 log_debug("CHRG_STAT 0x%x\n", (val >> 3) & 0x3);
339 log_debug("PG_STAT 0x%x\n", (val >> 2) & 1);
340 log_debug("SDP_STAT 0x%x\n", (val >> 1) & 1);
341 log_debug("VSYS_STAT 0x%x\n", val & 1);
342
343 val = dm_i2c_reg_read(udev, 0x00);
344 log_debug("REG00 0x%x\n", val);
345 iinlim = 100 + (val & 0x3f) * 50;
346 log_debug("IINLIM %d mA\n", iinlim);
347 log_debug("EN_HIZ 0x%x\n", (val >> 7) & 1);
348 log_debug("EN_ILIM 0x%x\n", (val >> 6) & 1);
349
350 /* set 1.6A charge limit */
351 dm_i2c_reg_write(udev, 0x04, 0x19);
352
353 /* re-enable charger */
354 val = dm_i2c_reg_read(udev, 0x03);
355 val = val | 0x10;
356 dm_i2c_reg_write(udev, 0x03, val);
357
358 return 0;
359}
360
361int board_init(void)
362{
363 struct udevice *dev;
364 int tps_ret;
365
366 if (IS_ENABLED(CONFIG_USB_DWC3) || IS_ENABLED(CONFIG_USB_XHCI_IMX8M)) {
367 log_debug("%s: initializing USB clk\n", __func__);
368
369 /* init_usb_clk won't enable the second clock if it's a USB boot */
370 if (is_usb_boot()) {
371 clock_enable(CCGR_USB_CTRL2, 1);
372 clock_enable(CCGR_USB_PHY2, 1);
373 }
374
375 printf("Enabling regulator-hub\n");
376 if (!regulator_get_by_devname("regulator-hub", &dev)) {
377 if (regulator_set_enable(dev, true))
378 pr_err("Failed to enable regulator-hub\n");
379 }
380 }
381
382 tps_ret = init_tps65982();
383 init_charger_bq25895();
384
385 if (!tps_ret) {
386 int current = tps65982_get_max_current();
387
388 if (current > 500)
389 bq25895_set_iinlim(current);
390
391 if (bq25895_battery_present())
392 tps65982_clear_dead_battery();
393 }
394
395 return 0;
396}
397
398int board_late_init(void)
399{
400 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
Arnaud Ferraris4432bbe2023-10-27 15:40:44 +0200401 /*
402 * Use the r4 dtb by default as those are the most
403 * widespread devices.
404 */
405 u32 rev, dtb_rev = 4;
Angus Ainslie3f8667c2022-08-25 06:46:02 -0700406 char rev_str[3];
Arnaud Ferraris4432bbe2023-10-27 15:40:44 +0200407 char fdt_str[50];
Angus Ainslie3f8667c2022-08-25 06:46:02 -0700408
409 env_set("board_name", "librem5");
410 if (fuse_read(9, 0, &rev)) {
411 env_set("board_rev", BOARD_REV_ERROR);
412 } else if (rev == 0) {
Arnaud Ferraris4432bbe2023-10-27 15:40:44 +0200413 /*
414 * If the fuses aren't burnt we should use either the
415 * r2 or r3 DTB. The latter makes more sense as there
416 * are far more r3 devices out there.
417 */
418 dtb_rev = 3;
Angus Ainslie3f8667c2022-08-25 06:46:02 -0700419 env_set("board_rev", BOARD_REV_UNKNOWN);
420 } else if (rev > 0) {
Arnaud Ferraris4432bbe2023-10-27 15:40:44 +0200421 if (rev == 1)
422 dtb_rev = 2;
423 else if (rev < dtb_rev)
424 dtb_rev = rev;
425 /*
426 * FCC-approved devices report '5' as their board
427 * revision but use the r4 DTB as the PCB's are
428 * functionally identical.
429 */
430 else if (rev == 5)
431 dtb_rev = 4;
Angus Ainslie3f8667c2022-08-25 06:46:02 -0700432 sprintf(rev_str, "%u", rev);
433 env_set("board_rev", rev_str);
434 }
435
436 printf("Board name: %s\n", env_get("board_name"));
437 printf("Board rev: %s\n", env_get("board_rev"));
Arnaud Ferraris4432bbe2023-10-27 15:40:44 +0200438
439 sprintf(fdt_str, "freescale/imx8mq-librem5-r%u.dtb", dtb_rev);
440 env_set("fdtfile", fdt_str);
Angus Ainslie3f8667c2022-08-25 06:46:02 -0700441 }
442
443 if (is_usb_boot()) {
444 puts("USB Boot\n");
445 env_set("bootcmd", "fastboot 0");
446 }
447
448 return 0;
449}