blob: 3a82e60a24715492f3e2273fcd3fa19a20a792d9 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Aneesh Bansal4b636c32016-01-22 17:05:59 +05302/*
3 * FSL PAMU driver
4 *
5 * Copyright 2012-2016 Freescale Semiconductor, Inc.
Aneesh Bansal4b636c32016-01-22 17:05:59 +05306 */
7
Tom Rinidec7ea02024-05-20 13:35:03 -06008#include <config.h>
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060010#include <linux/bitops.h>
Aneesh Bansal4b636c32016-01-22 17:05:59 +053011#include <linux/log2.h>
12#include <malloc.h>
13#include <asm/fsl_pamu.h>
Tom Rinidec7ea02024-05-20 13:35:03 -060014#include <asm/io.h>
15#include <asm/ppc.h>
Aneesh Bansal4b636c32016-01-22 17:05:59 +053016
17struct paace *ppaact;
18struct paace *sec;
19unsigned long fspi;
20
21static inline int __ilog2_roundup_64(uint64_t val)
22{
23 if ((val & (val - 1)) == 0)
24 return __ilog2_u64(val);
25 else
26 return __ilog2_u64(val) + 1;
27}
28
Aneesh Bansal4b636c32016-01-22 17:05:59 +053029static inline int count_lsb_zeroes(unsigned long val)
30{
31 return ffs(val) - 1;
32}
33
34static unsigned int map_addrspace_size_to_wse(uint64_t addrspace_size)
35{
36 /* window size is 2^(WSE+1) bytes */
37 return count_lsb_zeroes(addrspace_size >> PAMU_PAGE_SHIFT) +
38 PAMU_PAGE_SHIFT - 1;
39}
40
41static unsigned int map_subwindow_cnt_to_wce(uint32_t subwindow_cnt)
42{
43 /* window count is 2^(WCE+1) bytes */
44 return count_lsb_zeroes(subwindow_cnt) - 1;
45}
46
47static void pamu_setup_default_xfer_to_host_ppaace(struct paace *ppaace)
48{
49 set_bf(ppaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_PRIMARY);
50 set_bf(ppaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
51 PAACE_M_COHERENCE_REQ);
52}
53
54static void pamu_setup_default_xfer_to_host_spaace(struct paace *spaace)
55{
56 set_bf(spaace->addr_bitfields, PAACE_AF_PT, PAACE_PT_SECONDARY);
57 set_bf(spaace->domain_attr.to_host.coherency_required, PAACE_DA_HOST_CR,
58 PAACE_M_COHERENCE_REQ);
59}
60
61/** Sets up PPAACE entry for specified liodn
62 *
63 * @param[in] liodn Logical IO device number
64 * @param[in] win_addr starting address of DSA window
65 * @param[in] win-size size of DSA window
66 * @param[in] omi Operation mapping index -- if ~omi == 0 then omi
67 not defined
68 * @param[in] stashid cache stash id for associated cpu -- if ~stashid == 0
69 then stashid not defined
70 * @param[in] snoopid snoop id for hardware coherency -- if ~snoopid == 0
71 then snoopid not defined
72 * @param[in] subwin_cnt number of sub-windows
73 *
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010074 * Return: Returns 0 upon success else error code < 0 returned
Aneesh Bansal4b636c32016-01-22 17:05:59 +053075 */
76static int pamu_config_ppaace(uint32_t liodn, uint64_t win_addr,
77 uint64_t win_size, uint32_t omi,
78 uint32_t snoopid, uint32_t stashid,
79 uint32_t subwin_cnt)
80{
81 struct paace *ppaace;
82
83 if ((win_size & (win_size - 1)) || win_size < PAMU_PAGE_SIZE)
84 return -1;
85
86 if (win_addr & (win_size - 1))
87 return -2;
88
89 if (liodn > NUM_PPAACT_ENTRIES) {
90 printf("Entries in PPACT not sufficient\n");
91 return -3;
92 }
93
94 ppaace = &ppaact[liodn];
95
96 /* window size is 2^(WSE+1) bytes */
97 set_bf(ppaace->addr_bitfields, PPAACE_AF_WSE,
98 map_addrspace_size_to_wse(win_size));
99
100 pamu_setup_default_xfer_to_host_ppaace(ppaace);
101
102 if (sizeof(phys_addr_t) > 4)
103 ppaace->wbah = (u64)win_addr >> (PAMU_PAGE_SHIFT + 20);
104 else
105 ppaace->wbah = 0;
106
107 set_bf(ppaace->addr_bitfields, PPAACE_AF_WBAL,
108 (win_addr >> PAMU_PAGE_SHIFT));
109
110 /* set up operation mapping if it's configured */
111 if (omi < OME_NUMBER_ENTRIES) {
112 set_bf(ppaace->impl_attr, PAACE_IA_OTM, PAACE_OTM_INDEXED);
113 ppaace->op_encode.index_ot.omi = omi;
114 } else if (~omi != 0) {
115 return -3;
116 }
117
118 /* configure stash id */
119 if (~stashid != 0)
120 set_bf(ppaace->impl_attr, PAACE_IA_CID, stashid);
121
122 /* configure snoop id */
123 if (~snoopid != 0)
124 ppaace->domain_attr.to_host.snpid = snoopid;
125
126 if (subwin_cnt) {
127 /* window count is 2^(WCE+1) bytes */
128 set_bf(ppaace->impl_attr, PAACE_IA_WCE,
129 map_subwindow_cnt_to_wce(subwin_cnt));
130 set_bf(ppaace->addr_bitfields, PPAACE_AF_MW, 0x1);
131 ppaace->fspi = fspi;
132 fspi = fspi + DEFAULT_NUM_SUBWINDOWS - 1;
133 } else {
134 set_bf(ppaace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
135 }
136
Mario Sixc463b6d2019-01-21 09:18:21 +0100137 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530138 /* Mark the ppace entry valid */
139 ppaace->addr_bitfields |= PAACE_V_VALID;
Mario Sixc463b6d2019-01-21 09:18:21 +0100140 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530141
142 return 0;
143}
144
145static int pamu_config_spaace(uint32_t liodn,
146 uint64_t subwin_size, uint64_t subwin_addr, uint64_t size,
147 uint32_t omi, uint32_t snoopid, uint32_t stashid)
148{
149 struct paace *paace;
150 /* Align start addr of subwin to subwindoe size */
151 uint64_t sec_addr = subwin_addr & ~(subwin_size - 1);
152 uint64_t end_addr = subwin_addr + size;
153 int size_shift = __ilog2_u64(subwin_size);
154 uint64_t win_size = 0;
155 uint32_t index, swse;
156 unsigned long fspi_idx;
157
158 /* Recalculate the size */
159 size = end_addr - sec_addr;
160
161 if (!subwin_size)
162 return -1;
163
164 if (liodn > NUM_PPAACT_ENTRIES) {
165 printf("LIODN No programmed %d > no. of PPAACT entries %d\n",
166 liodn, NUM_PPAACT_ENTRIES);
167 return -1;
168 }
169
170 while (sec_addr < end_addr) {
171 debug("sec_addr < end_addr is %llx < %llx\n", sec_addr,
172 end_addr);
173 paace = &ppaact[liodn];
174 if (!paace)
175 return -1;
176 fspi_idx = paace->fspi;
177
178 /* Calculating the win_size here as if we map in index 0,
179 paace entry woudl need to be programmed for SWSE */
180 win_size = end_addr - sec_addr;
181 win_size = 1 << __ilog2_roundup_64(win_size);
182
183 if (win_size > subwin_size)
184 win_size = subwin_size;
185 else if (win_size < PAMU_PAGE_SIZE)
186 win_size = PAMU_PAGE_SIZE;
187
188 debug("win_size is %llx\n", win_size);
189
190 swse = map_addrspace_size_to_wse(win_size);
191 index = sec_addr >> size_shift;
192
193 if (index == 0) {
194 set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
195 set_bf(paace->addr_bitfields, PAACE_AF_AP,
196 PAACE_AP_PERMS_ALL);
197 sec_addr += subwin_size;
198 continue;
199 }
200
201 paace = sec + fspi_idx + index - 1;
202
203 debug("SPAACT:Writing at location %p, index %d\n", paace,
204 index);
205
206 pamu_setup_default_xfer_to_host_spaace(paace);
207 set_bf(paace->addr_bitfields, SPAACE_AF_LIODN, liodn);
208 set_bf(paace->addr_bitfields, PAACE_AF_AP, PAACE_AP_PERMS_ALL);
209
210 /* configure snoop id */
211 if (~snoopid != 0)
212 paace->domain_attr.to_host.snpid = snoopid;
213
214 if (paace->addr_bitfields & PAACE_V_VALID) {
215 debug("Reached overlap condition\n");
216 debug("%d < %d\n", get_bf(paace->win_bitfields,
217 PAACE_WIN_SWSE), swse);
218 if (get_bf(paace->win_bitfields, PAACE_WIN_SWSE) < swse)
219 set_bf(paace->win_bitfields, PAACE_WIN_SWSE,
220 swse);
221 } else {
222 set_bf(paace->win_bitfields, PAACE_WIN_SWSE, swse);
223 }
224
225 paace->addr_bitfields |= PAACE_V_VALID;
226 sec_addr += subwin_size;
227 }
228
229 return 0;
230}
231
232int pamu_init(void)
233{
Tom Rini6a5dccc2022-11-16 13:10:41 -0500234 u32 base_addr = CFG_SYS_PAMU_ADDR;
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530235 struct ccsr_pamu *regs;
236 u32 i = 0;
237 u64 ppaact_phys, ppaact_lim, ppaact_size;
238 u64 spaact_phys, spaact_lim, spaact_size;
239
240 ppaact_size = sizeof(struct paace) * NUM_PPAACT_ENTRIES;
241 spaact_size = sizeof(struct paace) * NUM_SPAACT_ENTRIES;
242
243 /* Allocate space for Primary PAACT Table */
Tom Rini364d0022023-01-10 11:19:45 -0500244#if (defined(CONFIG_SPL_BUILD) && defined(CFG_SPL_PPAACT_ADDR))
245 ppaact = (void *)CFG_SPL_PPAACT_ADDR;
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400246#else
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530247 ppaact = memalign(PAMU_TABLE_ALIGNMENT, ppaact_size);
248 if (!ppaact)
249 return -1;
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400250#endif
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530251 memset(ppaact, 0, ppaact_size);
252
253 /* Allocate space for Secondary PAACT Table */
Tom Rini364d0022023-01-10 11:19:45 -0500254#if (defined(CONFIG_SPL_BUILD) && defined(CFG_SPL_SPAACT_ADDR))
255 sec = (void *)CFG_SPL_SPAACT_ADDR;
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400256#else
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530257 sec = memalign(PAMU_TABLE_ALIGNMENT, spaact_size);
258 if (!sec)
259 return -1;
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400260#endif
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530261 memset(sec, 0, spaact_size);
262
263 ppaact_phys = virt_to_phys((void *)ppaact);
264 ppaact_lim = ppaact_phys + ppaact_size;
265
266 spaact_phys = (uint64_t)virt_to_phys((void *)sec);
267 spaact_lim = spaact_phys + spaact_size;
268
269 /* Configure all PAMU's */
Tom Rini364d0022023-01-10 11:19:45 -0500270 for (i = 0; i < CFG_NUM_PAMU; i++) {
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530271 regs = (struct ccsr_pamu *)base_addr;
272
273 out_be32(&regs->ppbah, ppaact_phys >> 32);
274 out_be32(&regs->ppbal, (uint32_t)ppaact_phys);
275
276 out_be32(&regs->pplah, (ppaact_lim) >> 32);
277 out_be32(&regs->pplal, (uint32_t)ppaact_lim);
278
279 if (sec != NULL) {
280 out_be32(&regs->spbah, spaact_phys >> 32);
281 out_be32(&regs->spbal, (uint32_t)spaact_phys);
282 out_be32(&regs->splah, spaact_lim >> 32);
283 out_be32(&regs->splal, (uint32_t)spaact_lim);
284 }
Mario Sixc463b6d2019-01-21 09:18:21 +0100285 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530286
287 base_addr += PAMU_OFFSET;
288 }
289
290 return 0;
291}
292
293void pamu_enable(void)
294{
295 u32 i = 0;
Tom Rini6a5dccc2022-11-16 13:10:41 -0500296 u32 base_addr = CFG_SYS_PAMU_ADDR;
Tom Rini364d0022023-01-10 11:19:45 -0500297 for (i = 0; i < CFG_NUM_PAMU; i++) {
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530298 setbits_be32((void *)base_addr + PAMU_PCR_OFFSET,
299 PAMU_PCR_PE);
Mario Sixc463b6d2019-01-21 09:18:21 +0100300 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530301 base_addr += PAMU_OFFSET;
302 }
303}
304
305void pamu_reset(void)
306{
307 u32 i = 0;
Tom Rini6a5dccc2022-11-16 13:10:41 -0500308 u32 base_addr = CFG_SYS_PAMU_ADDR;
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530309 struct ccsr_pamu *regs;
310
Tom Rini364d0022023-01-10 11:19:45 -0500311 for (i = 0; i < CFG_NUM_PAMU; i++) {
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530312 regs = (struct ccsr_pamu *)base_addr;
313 /* Clear PPAACT Base register */
314 out_be32(&regs->ppbah, 0);
315 out_be32(&regs->ppbal, 0);
316 out_be32(&regs->pplah, 0);
317 out_be32(&regs->pplal, 0);
318 out_be32(&regs->spbah, 0);
319 out_be32(&regs->spbal, 0);
320 out_be32(&regs->splah, 0);
321 out_be32(&regs->splal, 0);
322
323 clrbits_be32((void *)regs + PAMU_PCR_OFFSET, PAMU_PCR_PE);
Mario Sixc463b6d2019-01-21 09:18:21 +0100324 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530325 base_addr += PAMU_OFFSET;
326 }
327}
328
329void pamu_disable(void)
330{
331 u32 i = 0;
Tom Rini6a5dccc2022-11-16 13:10:41 -0500332 u32 base_addr = CFG_SYS_PAMU_ADDR;
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530333
Tom Rini364d0022023-01-10 11:19:45 -0500334 for (i = 0; i < CFG_NUM_PAMU; i++) {
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530335 clrbits_be32((void *)base_addr + PAMU_PCR_OFFSET, PAMU_PCR_PE);
Mario Sixc463b6d2019-01-21 09:18:21 +0100336 sync();
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530337 base_addr += PAMU_OFFSET;
338 }
339}
340
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530341static uint64_t find_max(uint64_t arr[], int num)
342{
343 int i = 0;
344 int max = 0;
345 for (i = 1 ; i < num; i++)
346 if (arr[max] < arr[i])
347 max = i;
348
349 return arr[max];
350}
351
352static uint64_t find_min(uint64_t arr[], int num)
353{
354 int i = 0;
355 int min = 0;
356 for (i = 1 ; i < num; i++)
357 if (arr[min] > arr[i])
358 min = i;
359
360 return arr[min];
361}
362
363static uint32_t get_win_cnt(uint64_t size)
364{
365 uint32_t win_cnt = DEFAULT_NUM_SUBWINDOWS;
366
367 while (win_cnt && (size/win_cnt) < PAMU_PAGE_SIZE)
368 win_cnt >>= 1;
369
370 return win_cnt;
371}
372
373int config_pamu(struct pamu_addr_tbl *tbl, int num_entries, uint32_t liodn)
374{
375 int i = 0;
376 int ret = 0;
377 uint32_t num_sec_windows = 0;
378 uint32_t num_windows = 0;
379 uint64_t min_addr, max_addr;
380 uint64_t size;
381 uint64_t subwin_size;
382 int sizebit;
383
384 min_addr = find_min(tbl->start_addr, num_entries);
385 max_addr = find_max(tbl->end_addr, num_entries);
386 size = max_addr - min_addr + 1;
387
388 if (!size)
389 return -1;
390
391 sizebit = __ilog2_roundup_64(size);
Priyanka Jain6275f002021-02-05 14:01:11 +0530392 size = 1ull << sizebit;
Aneesh Bansal4b636c32016-01-22 17:05:59 +0530393 debug("min start_addr is %llx\n", min_addr);
394 debug("max end_addr is %llx\n", max_addr);
395 debug("size found is %llx\n", size);
396
397 if (size < PAMU_PAGE_SIZE)
398 size = PAMU_PAGE_SIZE;
399
400 while (1) {
401 min_addr = min_addr & ~(size - 1);
402 if (min_addr + size > max_addr)
403 break;
404 size <<= 1;
405 if (!size)
406 return -1;
407 }
408 debug("PAACT :Base addr is %llx\n", min_addr);
409 debug("PAACT : Size is %llx\n", size);
410 num_windows = get_win_cnt(size);
411 /* For a single window, no spaact entries are required
412 * sec_sub_window count = 0 */
413 if (num_windows > 1)
414 num_sec_windows = num_windows;
415 else
416 num_sec_windows = 0;
417
418 ret = pamu_config_ppaace(liodn, min_addr,
419 size , -1, -1, -1, num_sec_windows);
420
421 if (ret < 0)
422 return ret;
423
424 debug("configured ppace\n");
425
426 if (num_sec_windows) {
427 subwin_size = size >> count_lsb_zeroes(num_sec_windows);
428 debug("subwin_size is %llx\n", subwin_size);
429
430 for (i = 0; i < num_entries; i++) {
431 ret = pamu_config_spaace(liodn,
432 subwin_size, tbl->start_addr[i] - min_addr,
433 tbl->size[i], -1, -1, -1);
434
435 if (ret < 0)
436 return ret;
437 }
438 }
439
440 return ret;
441}