blob: 475687955e059e535bd6057fc7fafbb38e30f053 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Mario Six10d14492017-01-11 16:01:00 +01002/*
3 * Copyright (C) 2015-2016 Reinhard Pfau <reinhard.pfau@gdsys.cc>
Mario Six10d14492017-01-11 16:01:00 +01004 */
5
6#include <config.h>
Mario Six10d14492017-01-11 16:01:00 +01007#include <errno.h>
8#include <asm/io.h>
9#include <asm/arch/cpu.h>
10#include <asm/arch/efuse.h>
11#include <asm/arch/soc.h>
Pali Rohár2662d2c2022-09-22 13:43:45 +020012#include <asm/gpio.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060013#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060014#include <linux/delay.h>
Mario Six10d14492017-01-11 16:01:00 +010015#include <linux/mbus.h>
16
17#if defined(CONFIG_MVEBU_EFUSE_FAKE)
18#define DRY_RUN
19#else
20#undef DRY_RUN
21#endif
22
23#define MBUS_EFUSE_BASE 0xF6000000
24#define MBUS_EFUSE_SIZE BIT(20)
25
26#define MVEBU_EFUSE_CONTROL (MVEBU_REGISTER(0xE4008))
27
28enum {
29 MVEBU_EFUSE_CTRL_PROGRAM_ENABLE = (1 << 31),
Pali Rohárdf1da732022-04-06 14:18:18 +020030 MVEBU_EFUSE_LD1_SELECT = (1 << 6),
Mario Six10d14492017-01-11 16:01:00 +010031};
32
33struct mvebu_hd_efuse {
34 u32 bits_31_0;
35 u32 bits_63_32;
36 u32 bit64;
37 u32 reserved0;
38};
39
40#ifndef DRY_RUN
41static struct mvebu_hd_efuse *efuses =
42 (struct mvebu_hd_efuse *)(MBUS_EFUSE_BASE + 0xF9000);
Pali Rohárdf1da732022-04-06 14:18:18 +020043static u32 *ld_efuses = (void *)MBUS_EFUSE_BASE + 0xF8F00;
Mario Six10d14492017-01-11 16:01:00 +010044#else
45static struct mvebu_hd_efuse efuses[EFUSE_LINE_MAX + 1];
Pali Rohárdf1da732022-04-06 14:18:18 +020046static u32 ld_efuses[EFUSE_LD_WORDS];
Mario Six10d14492017-01-11 16:01:00 +010047#endif
48
49static int efuse_initialised;
50
51static struct mvebu_hd_efuse *get_efuse_line(int nr)
52{
53 if (nr < 0 || nr > 63 || !efuse_initialised)
54 return NULL;
55
56 return efuses + nr;
57}
58
Pali Rohár2662d2c2022-09-22 13:43:45 +020059#ifndef DRY_RUN
60static int vhv_gpio;
61#endif
62
63static int enable_efuse_program(void)
Mario Six10d14492017-01-11 16:01:00 +010064{
65#ifndef DRY_RUN
Pali Rohár2662d2c2022-09-22 13:43:45 +020066 if (CONFIG_MVEBU_EFUSE_VHV_GPIO[0]) {
67 if (gpio_lookup_name(CONFIG_MVEBU_EFUSE_VHV_GPIO, NULL, NULL, &vhv_gpio)) {
68 printf("Error: VHV gpio lookup failed\n");
69 return -EOPNOTSUPP;
70 }
71 if (gpio_request(vhv_gpio, CONFIG_MVEBU_EFUSE_VHV_GPIO)) {
72 printf("Error: VHV gpio request failed\n");
73 return -EOPNOTSUPP;
74 }
75 if (gpio_direction_output(vhv_gpio,
76 IS_ENABLED(CONFIG_MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW) ? 0 : 1)) {
77 printf("Error: VHV gpio enable failed\n");
78 return -EINVAL;
79 }
80 mdelay(5); /* Wait for the VHV power to stabilize */
81 }
82
Mario Six10d14492017-01-11 16:01:00 +010083 setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
84#endif
Pali Rohár2662d2c2022-09-22 13:43:45 +020085
86 return 0;
Mario Six10d14492017-01-11 16:01:00 +010087}
88
89static void disable_efuse_program(void)
90{
91#ifndef DRY_RUN
92 clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
Pali Rohár2662d2c2022-09-22 13:43:45 +020093
94 if (CONFIG_MVEBU_EFUSE_VHV_GPIO[0]) {
95 if (gpio_direction_output(vhv_gpio,
96 IS_ENABLED(CONFIG_MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW) ? 1 : 0))
97 printf("Error: VHV gpio disable failed\n");
98 gpio_free(vhv_gpio);
99 vhv_gpio = 0;
100 }
Mario Six10d14492017-01-11 16:01:00 +0100101#endif
102}
103
104static int do_prog_efuse(struct mvebu_hd_efuse *efuse,
105 struct efuse_val *new_val, u32 mask0, u32 mask1)
106{
107 struct efuse_val val;
108
109 val.dwords.d[0] = readl(&efuse->bits_31_0);
110 val.dwords.d[1] = readl(&efuse->bits_63_32);
111 val.lock = readl(&efuse->bit64);
112
113 if (val.lock & 1)
114 return -EPERM;
115
116 val.dwords.d[0] |= (new_val->dwords.d[0] & mask0);
117 val.dwords.d[1] |= (new_val->dwords.d[1] & mask1);
118 val.lock |= new_val->lock;
119
120 writel(val.dwords.d[0], &efuse->bits_31_0);
121 mdelay(1);
122 writel(val.dwords.d[1], &efuse->bits_63_32);
123 mdelay(1);
124 writel(val.lock, &efuse->bit64);
125 mdelay(5);
126
127 return 0;
128}
129
130static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1)
131{
132 struct mvebu_hd_efuse *efuse;
133 int res = 0;
134
135 res = mvebu_efuse_init_hw();
136 if (res)
137 return res;
138
139 efuse = get_efuse_line(nr);
140 if (!efuse)
141 return -ENODEV;
142
143 if (!new_val)
144 return -EINVAL;
145
146 /* only write a fuse line with lock bit */
147 if (!new_val->lock)
148 return -EINVAL;
149
150 /* according to specs ECC protection bits must be 0 on write */
151 if (new_val->bytes.d[7] & 0xFE)
152 return -EINVAL;
153
154 if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1))
155 return 0;
156
Pali Rohár2662d2c2022-09-22 13:43:45 +0200157 res = enable_efuse_program();
158 if (res)
159 return res;
Mario Six10d14492017-01-11 16:01:00 +0100160
161 res = do_prog_efuse(efuse, new_val, mask0, mask1);
162
163 disable_efuse_program();
164
165 return res;
166}
167
Pali Rohár666252d2022-09-22 13:43:44 +0200168int mvebu_prog_ld_efuse(int ld1, u32 word, u32 val)
169{
170 int i, res;
171 u32 line[EFUSE_LD_WORDS];
172
173 res = mvebu_efuse_init_hw();
174 if (res)
175 return res;
176
177 mvebu_read_ld_efuse(ld1, line);
178
179 /* check if lock bit is already programmed */
180 if (line[EFUSE_LD_WORDS - 1])
181 return -EPERM;
182
183 /* check if word is valid */
184 if (word >= EFUSE_LD_WORDS)
185 return -EINVAL;
186
187 /* check if there is some bit for programming */
188 if (val == (line[word] & val))
189 return 0;
190
Pali Rohár2662d2c2022-09-22 13:43:45 +0200191 res = enable_efuse_program();
192 if (res)
193 return res;
Pali Rohár666252d2022-09-22 13:43:44 +0200194
195 mvebu_read_ld_efuse(ld1, line);
196 line[word] |= val;
197
198 for (i = 0; i < EFUSE_LD_WORDS; i++) {
199 writel(line[i], ld_efuses + i);
200 mdelay(1);
201 }
202
203 mdelay(5);
204
205 disable_efuse_program();
206
207 return 0;
208}
209
Mario Six10d14492017-01-11 16:01:00 +0100210int mvebu_efuse_init_hw(void)
211{
212 int ret;
213
214 if (efuse_initialised)
215 return 0;
216
217 ret = mvebu_mbus_add_window_by_id(
218 CPU_TARGET_SATA23_DFX, 0xA, MBUS_EFUSE_BASE, MBUS_EFUSE_SIZE);
219
220 if (ret)
221 return ret;
222
223 efuse_initialised = 1;
224
225 return 0;
226}
227
228int mvebu_read_efuse(int nr, struct efuse_val *val)
229{
230 struct mvebu_hd_efuse *efuse;
231 int res;
232
233 res = mvebu_efuse_init_hw();
234 if (res)
235 return res;
236
237 efuse = get_efuse_line(nr);
238 if (!efuse)
239 return -ENODEV;
240
241 if (!val)
242 return -EINVAL;
243
244 val->dwords.d[0] = readl(&efuse->bits_31_0);
245 val->dwords.d[1] = readl(&efuse->bits_63_32);
246 val->lock = readl(&efuse->bit64);
247 return 0;
248}
249
Pali Rohárdf1da732022-04-06 14:18:18 +0200250void mvebu_read_ld_efuse(int ld1, u32 *line)
251{
252 int i;
253
254#ifndef DRY_RUN
255 if (ld1)
256 setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_LD1_SELECT);
257 else
258 clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_LD1_SELECT);
259#endif
260
261 for (i = 0; i < EFUSE_LD_WORDS; i++)
262 line[i] = readl(ld_efuses + i);
263}
264
Mario Six10d14492017-01-11 16:01:00 +0100265int mvebu_write_efuse(int nr, struct efuse_val *val)
266{
267 return prog_efuse(nr, val, ~0, ~0);
268}
269
270int mvebu_lock_efuse(int nr)
271{
272 struct efuse_val val = {
273 .lock = 1,
274 };
275
276 return prog_efuse(nr, &val, 0, 0);
277}
278
279/*
280 * wrapper funcs providing the fuse API
281 *
282 * we use the following mapping:
283 * "bank" -> eFuse line
284 * "word" -> 0: bits 0-31
285 * 1: bits 32-63
286 * 2: bit 64 (lock)
287 */
288
289static struct efuse_val prog_val;
290static int valid_prog_words;
291
292int fuse_read(u32 bank, u32 word, u32 *val)
293{
294 struct efuse_val fuse_line;
Pali Rohárdf1da732022-04-06 14:18:18 +0200295 u32 ld_line[EFUSE_LD_WORDS];
Mario Six10d14492017-01-11 16:01:00 +0100296 int res;
297
Pali Rohárdf1da732022-04-06 14:18:18 +0200298 if ((bank == EFUSE_LD0_LINE || bank == EFUSE_LD1_LINE) && word < EFUSE_LD_WORDS) {
299 res = mvebu_efuse_init_hw();
300 if (res)
301 return res;
302 mvebu_read_ld_efuse(bank == EFUSE_LD1_LINE, ld_line);
303 *val = ld_line[word];
304 return 0;
305 }
306
Mario Six10d14492017-01-11 16:01:00 +0100307 if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
308 return -EINVAL;
309
310 res = mvebu_read_efuse(bank, &fuse_line);
311 if (res)
312 return res;
313
314 if (word < 2)
315 *val = fuse_line.dwords.d[word];
316 else
317 *val = fuse_line.lock;
318
319 return res;
320}
321
322int fuse_sense(u32 bank, u32 word, u32 *val)
323{
324 /* not supported */
325 return -ENOSYS;
326}
327
328int fuse_prog(u32 bank, u32 word, u32 val)
329{
330 int res = 0;
331
Pali Rohár666252d2022-09-22 13:43:44 +0200332 if (bank == EFUSE_LD0_LINE || bank == EFUSE_LD1_LINE)
333 return mvebu_prog_ld_efuse(bank == EFUSE_LD1_LINE, word, val);
334
Mario Six10d14492017-01-11 16:01:00 +0100335 /*
336 * NOTE: Fuse line should be written as whole.
337 * So how can we do that with this API?
338 * For now: remember values for word == 0 and word == 1 and write the
339 * whole line when word == 2.
340 * This implies that we always require all 3 fuse prog cmds (one for
341 * for each word) to write a single fuse line.
342 * Exception is a single write to word 2 which will lock the fuse line.
343 *
344 * Hope that will be OK.
345 */
346
347 if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
348 return -EINVAL;
349
350 if (word < 2) {
351 prog_val.dwords.d[word] = val;
352 valid_prog_words |= (1 << word);
353 } else if ((valid_prog_words & 3) == 0 && val) {
354 res = mvebu_lock_efuse(bank);
355 valid_prog_words = 0;
356 } else if ((valid_prog_words & 3) != 3 || !val) {
357 res = -EINVAL;
358 } else {
359 prog_val.lock = val != 0;
360 res = mvebu_write_efuse(bank, &prog_val);
361 valid_prog_words = 0;
362 }
363
364 return res;
365}
366
367int fuse_override(u32 bank, u32 word, u32 val)
368{
369 /* not supported */
370 return -ENOSYS;
371}