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developer13dc3c82020-10-16 11:38:39 +08001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2016 MediaTek Inc.
4 *
5 * Author: Chunfeng Yun <chunfeng.yun@mediatek.com>
6 */
7
developer13dc3c82020-10-16 11:38:39 +08008#include <dm/lists.h>
9#include <linux/iopoll.h>
10
11#include "mtu3.h"
12#include "mtu3_dr.h"
13
14void ssusb_set_force_mode(struct ssusb_mtk *ssusb,
15 enum mtu3_dr_force_mode mode)
16{
17 u32 value;
18
19 value = mtu3_readl(ssusb->ippc_base, SSUSB_U2_CTRL(0));
20 switch (mode) {
21 case MTU3_DR_FORCE_DEVICE:
22 value |= SSUSB_U2_PORT_FORCE_IDDIG | SSUSB_U2_PORT_RG_IDDIG;
23 break;
24 case MTU3_DR_FORCE_HOST:
25 value |= SSUSB_U2_PORT_FORCE_IDDIG;
26 value &= ~SSUSB_U2_PORT_RG_IDDIG;
27 break;
28 case MTU3_DR_FORCE_NONE:
29 value &= ~(SSUSB_U2_PORT_FORCE_IDDIG | SSUSB_U2_PORT_RG_IDDIG);
30 break;
31 default:
32 return;
33 }
34 mtu3_writel(ssusb->ippc_base, SSUSB_U2_CTRL(0), value);
35}
36
37/* u2-port0 should be powered on and enabled; */
38int ssusb_check_clocks(struct ssusb_mtk *ssusb, u32 ex_clks)
39{
40 void __iomem *ibase = ssusb->ippc_base;
41 u32 value, check_val;
42 int ret;
43
44 check_val = ex_clks | SSUSB_SYS125_RST_B_STS | SSUSB_SYSPLL_STABLE |
45 SSUSB_REF_RST_B_STS;
46
47 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS1, value,
48 ((value & check_val) == check_val), 10000);
49 if (ret) {
50 dev_err(ssusb->dev, "clks of sts1 are not stable!\n");
51 return ret;
52 }
53
54 ret = readl_poll_timeout(ibase + U3D_SSUSB_IP_PW_STS2, value,
55 (value & SSUSB_U2_MAC_SYS_RST_B_STS), 10000);
56 if (ret) {
57 dev_err(ssusb->dev, "mac2 clock is not stable\n");
58 return ret;
59 }
60
61 return 0;
62}
63
64int ssusb_phy_setup(struct ssusb_mtk *ssusb)
65{
66 struct udevice *dev = ssusb->dev;
67 struct phy_bulk *phys = &ssusb->phys;
68 int ret;
69
70 ret = generic_phy_get_bulk(dev, phys);
71 if (ret)
72 return ret;
73
74 ret = generic_phy_init_bulk(phys);
75 if (ret)
76 return ret;
77
78 ret = generic_phy_power_on_bulk(phys);
79 if (ret)
80 generic_phy_exit_bulk(phys);
81
82 return ret;
83}
84
85void ssusb_phy_shutdown(struct ssusb_mtk *ssusb)
86{
87 generic_phy_power_off_bulk(&ssusb->phys);
88 generic_phy_exit_bulk(&ssusb->phys);
89}
90
91static int ssusb_rscs_init(struct ssusb_mtk *ssusb)
92{
93 int ret = 0;
94
95 ret = regulator_set_enable(ssusb->vusb33_supply, true);
96 if (ret < 0 && ret != -ENOSYS) {
97 dev_err(ssusb->dev, "failed to enable vusb33\n");
98 goto vusb33_err;
99 }
100
101 ret = clk_enable_bulk(&ssusb->clks);
102 if (ret)
103 goto clks_err;
104
105 ret = ssusb_phy_setup(ssusb);
106 if (ret) {
107 dev_err(ssusb->dev, "failed to setup phy\n");
108 goto phy_err;
109 }
110
111 return 0;
112
113phy_err:
114 clk_disable_bulk(&ssusb->clks);
115clks_err:
116 regulator_set_enable(ssusb->vusb33_supply, false);
117vusb33_err:
118 return ret;
119}
120
121static void ssusb_rscs_exit(struct ssusb_mtk *ssusb)
122{
123 clk_disable_bulk(&ssusb->clks);
124 regulator_set_enable(ssusb->vusb33_supply, false);
125 ssusb_phy_shutdown(ssusb);
126}
127
128static void ssusb_ip_sw_reset(struct ssusb_mtk *ssusb)
129{
130 /* reset whole ip (xhci & u3d) */
131 mtu3_setbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
132 udelay(1);
133 mtu3_clrbits(ssusb->ippc_base, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
134}
135
136static int get_ssusb_rscs(struct udevice *dev, struct ssusb_mtk *ssusb)
137{
138 struct udevice *child;
139 int ret;
140
141 ret = device_get_supply_regulator(dev, "vusb33-supply",
142 &ssusb->vusb33_supply);
143 if (ret) /* optional, ignore error */
144 dev_warn(dev, "can't get optional vusb33 %d\n", ret);
145
146 ret = device_get_supply_regulator(dev, "vbus-supply",
147 &ssusb->vbus_supply);
148 if (ret) /* optional, ignore error */
149 dev_warn(dev, "can't get optional vbus regulator %d!\n", ret);
150
151 ret = clk_get_bulk(dev, &ssusb->clks);
152 if (ret) {
153 dev_err(dev, "failed to get clocks %d!\n", ret);
154 return ret;
155 }
156
157 ssusb->ippc_base = devfdt_remap_addr_name(dev, "ippc");
158 if (!ssusb->ippc_base) {
159 dev_err(dev, "error mapping memory for ippc\n");
160 return -ENODEV;
161 }
162
163 ret = device_find_first_child(dev, &child);
164 if (ret || !child) {
165 dev_err(dev, "failed to get child %d!\n", ret);
166 return ret;
167 }
168
169 ssusb->mac_base = devfdt_remap_addr_name(child, "mac");
170 if (!ssusb->mac_base) {
171 dev_err(dev, "error mapping memory for mac\n");
172 return -ENODEV;
173 }
174
Simon Glassa7ece582020-12-19 10:40:14 -0700175 ssusb->dr_mode = usb_get_dr_mode(dev_ofnode(child));
developer13dc3c82020-10-16 11:38:39 +0800176
177 if (ssusb->dr_mode == USB_DR_MODE_UNKNOWN ||
178 ssusb->dr_mode == USB_DR_MODE_OTG)
179 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
180
181 if (IS_ENABLED(CONFIG_USB_MTU3_GADGET))
182 ssusb->dr_mode = USB_DR_MODE_PERIPHERAL;
183 else if (IS_ENABLED(CONFIG_USB_MTU3_HOST))
184 ssusb->dr_mode = USB_DR_MODE_HOST;
185
186 dev_info(dev, "dr_mode: %d, ippc: 0x%p, mac: 0x%p\n",
187 ssusb->dr_mode, ssusb->ippc_base, ssusb->mac_base);
188
189 return 0;
190}
191
192static int mtu3_probe(struct udevice *dev)
193{
194 struct ssusb_mtk *ssusb = dev_get_priv(dev);
195 int ret = -ENOMEM;
196
197 ssusb->dev = dev;
198
199 ret = get_ssusb_rscs(dev, ssusb);
200 if (ret)
201 return ret;
202
203 ret = ssusb_rscs_init(ssusb);
204 if (ret)
205 return ret;
206
207 ssusb_ip_sw_reset(ssusb);
208
209 return 0;
210}
211
212static int mtu3_remove(struct udevice *dev)
213{
214 struct ssusb_mtk *ssusb = dev_to_ssusb(dev);
215
216 ssusb_rscs_exit(ssusb);
217 return 0;
218}
219
220static const struct udevice_id ssusb_of_match[] = {
221 {.compatible = "mediatek,ssusb",},
222 {},
223};
224
225#if CONFIG_IS_ENABLED(DM_USB_GADGET)
226int dm_usb_gadget_handle_interrupts(struct udevice *dev)
227{
228 struct mtu3 *mtu = dev_get_priv(dev);
229
230 mtu3_irq(0, mtu);
231
232 return 0;
233}
234
235static int mtu3_gadget_probe(struct udevice *dev)
236{
237 struct ssusb_mtk *ssusb = dev_to_ssusb(dev->parent);
238 struct mtu3 *mtu = dev_get_priv(dev);
239
240 mtu->dev = dev;
241 ssusb->u3d = mtu;
242 return ssusb_gadget_init(ssusb);
243}
244
245static int mtu3_gadget_remove(struct udevice *dev)
246{
247 struct mtu3 *mtu = dev_get_priv(dev);
248
249 ssusb_gadget_exit(mtu->ssusb);
250 return 0;
251}
252
253U_BOOT_DRIVER(mtu3_peripheral) = {
254 .name = "mtu3-peripheral",
255 .id = UCLASS_USB_GADGET_GENERIC,
256 .of_match = ssusb_of_match,
257 .probe = mtu3_gadget_probe,
258 .remove = mtu3_gadget_remove,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700259 .priv_auto = sizeof(struct mtu3),
developer13dc3c82020-10-16 11:38:39 +0800260};
261#endif
262
Simon Glass1f2440c2021-07-10 21:14:29 -0600263#if defined(CONFIG_SPL_USB_HOST) || \
developer13dc3c82020-10-16 11:38:39 +0800264 (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
265static int mtu3_host_probe(struct udevice *dev)
266{
267 struct ssusb_mtk *ssusb = dev_to_ssusb(dev->parent);
268 struct mtu3_host *u3h = dev_get_priv(dev);
269 struct xhci_hcor *hcor;
270 int rc;
271
272 u3h->dev = dev;
273 ssusb->u3h = u3h;
274 rc = ssusb_host_init(ssusb);
275 if (rc)
276 return rc;
277
278 u3h->ctrl.quirks = XHCI_MTK_HOST;
279 hcor = (struct xhci_hcor *)((uintptr_t)u3h->hcd +
280 HC_LENGTH(xhci_readl(&u3h->hcd->cr_capbase)));
281
282 return xhci_register(dev, u3h->hcd, hcor);
283}
284
285static int mtu3_host_remove(struct udevice *dev)
286{
287 struct mtu3_host *u3h = dev_get_priv(dev);
288
289 xhci_deregister(dev);
290 ssusb_host_exit(u3h->ssusb);
291 return 0;
292}
293
294U_BOOT_DRIVER(mtu3_host) = {
295 .name = "mtu3-host",
296 .id = UCLASS_USB,
297 .of_match = ssusb_of_match,
298 .probe = mtu3_host_probe,
299 .remove = mtu3_host_remove,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700300 .priv_auto = sizeof(struct mtu3_host),
developer13dc3c82020-10-16 11:38:39 +0800301 .ops = &xhci_usb_ops,
302 .flags = DM_FLAG_ALLOC_PRIV_DMA,
303};
304#endif
305
306static int mtu3_glue_bind(struct udevice *parent)
307{
308 struct udevice *dev;
309 enum usb_dr_mode dr_mode;
310 const char *driver;
311 const char *name;
312 ofnode node;
313 int ret;
314
Simon Glassa7ece582020-12-19 10:40:14 -0700315 node = ofnode_by_compatible(dev_ofnode(parent), "mediatek,ssusb");
developer13dc3c82020-10-16 11:38:39 +0800316 if (!ofnode_valid(node))
317 return -ENODEV;
318
319 name = ofnode_get_name(node);
320 dr_mode = usb_get_dr_mode(node);
321
322 switch (dr_mode) {
323#if CONFIG_IS_ENABLED(DM_USB_GADGET)
324 case USB_DR_MODE_PERIPHERAL:
325 case USB_DR_MODE_OTG:
326 dev_dbg(parent, "%s: dr_mode: peripheral\n", __func__);
327 driver = "mtu3-peripheral";
328 break;
329#endif
330
Simon Glass1f2440c2021-07-10 21:14:29 -0600331#if defined(CONFIG_SPL_USB_HOST) || \
developer13dc3c82020-10-16 11:38:39 +0800332 (!defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST))
333 case USB_DR_MODE_HOST:
334 dev_dbg(parent, "%s: dr_mode: host\n", __func__);
335 driver = "mtu3-host";
336 break;
337#endif
338 default:
339 dev_err(parent, "%s: unsupported dr_mode %d\n",
340 __func__, dr_mode);
341 return -ENODEV;
342 };
343
344 dev_dbg(parent, "%s: node name: %s, driver %s, dr_mode %d\n",
345 __func__, name, driver, dr_mode);
346
347 ret = device_bind_driver_to_node(parent, driver, name, node, &dev);
348 if (ret)
349 dev_err(parent, "%s: not able to bind usb device mode\n",
350 __func__);
351
352 return ret;
353}
354
355static const struct udevice_id mtu3_of_match[] = {
356 {.compatible = "mediatek,mtu3",},
357 {},
358};
359
360U_BOOT_DRIVER(mtu3) = {
361 .name = "mtu3",
362 .id = UCLASS_NOP,
363 .of_match = mtu3_of_match,
364 .bind = mtu3_glue_bind,
365 .probe = mtu3_probe,
366 .remove = mtu3_remove,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700367 .priv_auto = sizeof(struct ssusb_mtk),
developer13dc3c82020-10-16 11:38:39 +0800368};