blob: 166ee9fcd431a61e32a3273633ed631f1a1f9ba2 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassd9e90bb2015-03-05 12:25:28 -07002/*
3 * Copyright (c) 2014 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Simon Glassd9e90bb2015-03-05 12:25:28 -07005 */
6
Simon Glassd9e90bb2015-03-05 12:25:28 -07007#include <dm.h>
8#include <fdtdec.h>
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Masahiro Yamada75f82d02018-03-05 01:20:11 +090010#include <linux/libfdt.h>
Simon Glassd9e90bb2015-03-05 12:25:28 -070011#include <pci.h>
12#include <dm/lists.h>
13
Bin Meng11c41ab2018-08-03 01:14:49 -070014struct sandbox_pci_emul_priv {
Simon Glassd9e90bb2015-03-05 12:25:28 -070015 int dev_count;
16};
17
Simon Glass2a311e82020-01-27 08:49:37 -070018int sandbox_pci_get_emul(const struct udevice *bus, pci_dev_t find_devfn,
Bin Meng156bc6f2018-08-03 01:14:45 -070019 struct udevice **containerp, struct udevice **emulp)
Simon Glassd9e90bb2015-03-05 12:25:28 -070020{
Simon Glassa51fd072019-09-21 14:32:41 -060021 struct pci_emul_uc_priv *upriv;
Simon Glassd9e90bb2015-03-05 12:25:28 -070022 struct udevice *dev;
23 int ret;
24
Bin Meng156bc6f2018-08-03 01:14:45 -070025 *containerp = NULL;
Bin Meng2fc987e2018-08-03 01:14:43 -070026 ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(find_devfn), &dev);
Simon Glassd9e90bb2015-03-05 12:25:28 -070027 if (ret) {
28 debug("%s: Could not find emulator for dev %x\n", __func__,
29 find_devfn);
30 return ret;
31 }
Bin Meng156bc6f2018-08-03 01:14:45 -070032 *containerp = dev;
Simon Glassd9e90bb2015-03-05 12:25:28 -070033
Simon Glass1bc0f4f2019-08-31 17:59:32 -060034 ret = uclass_get_device_by_phandle(UCLASS_PCI_EMUL, dev, "sandbox,emul",
35 emulp);
Simon Glassa51fd072019-09-21 14:32:41 -060036 if (!ret) {
37 upriv = dev_get_uclass_priv(*emulp);
38
39 upriv->client = dev;
40 } else if (device_get_uclass_id(dev) != UCLASS_PCI_GENERIC) {
41 /*
42 * See commit 4345998ae9df,
43 * "pci: sandbox: Support dynamically binding device driver"
44 */
Bin Meng156bc6f2018-08-03 01:14:45 -070045 *emulp = dev;
Simon Glassa51fd072019-09-21 14:32:41 -060046 }
47
48 return 0;
49}
Simon Glassd9e90bb2015-03-05 12:25:28 -070050
Simon Glassa51fd072019-09-21 14:32:41 -060051int sandbox_pci_get_client(struct udevice *emul, struct udevice **devp)
52{
53 struct pci_emul_uc_priv *upriv = dev_get_uclass_priv(emul);
54
55 if (!upriv->client)
56 return -ENOENT;
57 *devp = upriv->client;
58
59 return 0;
Simon Glassd9e90bb2015-03-05 12:25:28 -070060}
61
Simon Glass72231f72019-09-25 08:56:42 -060062uint sandbox_pci_read_bar(u32 barval, int type, uint size)
63{
64 u32 result;
65
66 result = barval;
67 if (result == 0xffffffff) {
68 if (type == PCI_BASE_ADDRESS_SPACE_IO) {
69 result = (~(size - 1) &
70 PCI_BASE_ADDRESS_IO_MASK) |
71 PCI_BASE_ADDRESS_SPACE_IO;
72 } else {
73 result = (~(size - 1) &
74 PCI_BASE_ADDRESS_MEM_MASK) |
75 PCI_BASE_ADDRESS_MEM_TYPE_32;
76 }
77 }
78
79 return result;
80}
81
Simon Glassd9e90bb2015-03-05 12:25:28 -070082static int sandbox_pci_emul_post_probe(struct udevice *dev)
83{
Simon Glass95588622020-12-22 19:30:28 -070084 struct sandbox_pci_emul_priv *priv = uclass_get_priv(dev->uclass);
Simon Glassd9e90bb2015-03-05 12:25:28 -070085
86 priv->dev_count++;
87 sandbox_set_enable_pci_map(true);
88
89 return 0;
90}
91
92static int sandbox_pci_emul_pre_remove(struct udevice *dev)
93{
Simon Glass95588622020-12-22 19:30:28 -070094 struct sandbox_pci_emul_priv *priv = uclass_get_priv(dev->uclass);
Simon Glassd9e90bb2015-03-05 12:25:28 -070095
96 priv->dev_count--;
97 sandbox_set_enable_pci_map(priv->dev_count > 0);
98
99 return 0;
100}
101
102UCLASS_DRIVER(pci_emul) = {
103 .id = UCLASS_PCI_EMUL,
104 .name = "pci_emul",
105 .post_probe = sandbox_pci_emul_post_probe,
106 .pre_remove = sandbox_pci_emul_pre_remove,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700107 .priv_auto = sizeof(struct sandbox_pci_emul_priv),
108 .per_device_auto = sizeof(struct pci_emul_uc_priv),
Simon Glassd9e90bb2015-03-05 12:25:28 -0700109};
Simon Glassb98ba4c2019-09-25 08:56:10 -0600110
111/*
Simon Glass71fa5b42020-12-03 16:55:18 -0700112 * This uclass is a child of the pci bus. Its plat is not defined here so
Simon Glassb75b15b2020-12-03 16:55:23 -0700113 * is defined by its parent, UCLASS_PCI, which uses struct pci_child_plat.
Simon Glass71fa5b42020-12-03 16:55:18 -0700114 * See per_child_plat_auto in UCLASS_DRIVER(pci).
Simon Glassb98ba4c2019-09-25 08:56:10 -0600115 */
116UCLASS_DRIVER(pci_emul_parent) = {
117 .id = UCLASS_PCI_EMUL_PARENT,
118 .name = "pci_emul_parent",
119 .post_bind = dm_scan_fdt_dev,
120};
121
122static const struct udevice_id pci_emul_parent_ids[] = {
123 { .compatible = "sandbox,pci-emul-parent" },
124 { }
125};
126
127U_BOOT_DRIVER(pci_emul_parent_drv) = {
128 .name = "pci_emul_parent_drv",
129 .id = UCLASS_PCI_EMUL_PARENT,
130 .of_match = pci_emul_parent_ids,
131};