blob: 1b6c91141865c50a29245b601b13cee4bc3036cb [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +01002/*
Marcel Ziswiler75b93272020-01-28 14:42:23 +01003 * Copyright (c) 2016-2020 Toradex
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +01004 */
5
6#include <common.h>
7#include "tdx-cfg-block.h"
8
Marcel Ziswiler2658c8e2019-04-09 17:25:32 +02009#if defined(CONFIG_TARGET_APALIS_IMX6) || \
Marcel Ziswiler00320612019-07-12 12:35:08 +020010 defined(CONFIG_TARGET_APALIS_IMX8) || \
Marcel Ziswiler75b93272020-01-28 14:42:23 +010011 defined(CONFIG_TARGET_APALIS_IMX8X) || \
Marcel Ziswiler2658c8e2019-04-09 17:25:32 +020012 defined(CONFIG_TARGET_COLIBRI_IMX6) || \
Marcel Ziswilereca26ba2020-01-28 14:42:24 +010013 defined(CONFIG_TARGET_COLIBRI_IMX8X) || \
14 defined(CONFIG_TARGET_VERDIN_IMX8MM) || \
15 defined(CONFIG_TARGET_VERDIN_IMX8MN)
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +010016#include <asm/arch/sys_proto.h>
17#else
18#define is_cpu_type(cpu) (0)
19#endif
20#if defined(CONFIG_CPU_PXA27X)
21#include <asm/arch-pxa/pxa.h>
22#else
23#define cpu_is_pxa27x(cpu) (0)
24#endif
25#include <cli.h>
26#include <console.h>
Simon Glass0af6e2d2019-08-01 09:46:52 -060027#include <env.h>
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +010028#include <flash.h>
29#include <malloc.h>
30#include <mmc.h>
31#include <nand.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -060032#include <asm/mach-types.h>
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +010033
34DECLARE_GLOBAL_DATA_PTR;
35
36#define TAG_VALID 0xcf01
37#define TAG_MAC 0x0000
38#define TAG_HW 0x0008
39#define TAG_INVALID 0xffff
40
41#define TAG_FLAG_VALID 0x1
42
43#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
44#define TDX_CFG_BLOCK_MAX_SIZE 512
45#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
46#define TDX_CFG_BLOCK_MAX_SIZE 64
47#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
48#define TDX_CFG_BLOCK_MAX_SIZE 64
49#else
50#error Toradex config block location not set
51#endif
52
53struct toradex_tag {
54 u32 len:14;
55 u32 flags:2;
56 u32 id:16;
57};
58
59bool valid_cfgblock;
60struct toradex_hw tdx_hw_tag;
61struct toradex_eth_addr tdx_eth_addr;
62u32 tdx_serial;
63
64const char * const toradex_modules[] = {
65 [0] = "UNKNOWN MODULE",
66 [1] = "Colibri PXA270 312MHz",
67 [2] = "Colibri PXA270 520MHz",
68 [3] = "Colibri PXA320 806MHz",
69 [4] = "Colibri PXA300 208MHz",
70 [5] = "Colibri PXA310 624MHz",
71 [6] = "Colibri PXA320 806MHz IT",
72 [7] = "Colibri PXA300 208MHz XT",
73 [8] = "Colibri PXA270 312MHz",
74 [9] = "Colibri PXA270 520MHz",
75 [10] = "Colibri VF50 128MB", /* not currently on sale */
76 [11] = "Colibri VF61 256MB",
77 [12] = "Colibri VF61 256MB IT",
78 [13] = "Colibri VF50 128MB IT",
79 [14] = "Colibri iMX6 Solo 256MB",
80 [15] = "Colibri iMX6 DualLite 512MB",
81 [16] = "Colibri iMX6 Solo 256MB IT",
82 [17] = "Colibri iMX6 DualLite 512MB IT",
83 [18] = "UNKNOWN MODULE",
84 [19] = "UNKNOWN MODULE",
85 [20] = "Colibri T20 256MB",
86 [21] = "Colibri T20 512MB",
87 [22] = "Colibri T20 512MB IT",
88 [23] = "Colibri T30 1GB",
89 [24] = "Colibri T20 256MB IT",
90 [25] = "Apalis T30 2GB",
91 [26] = "Apalis T30 1GB",
92 [27] = "Apalis iMX6 Quad 1GB",
93 [28] = "Apalis iMX6 Quad 2GB IT",
94 [29] = "Apalis iMX6 Dual 512MB",
95 [30] = "Colibri T30 1GB IT",
96 [31] = "Apalis T30 1GB IT",
97 [32] = "Colibri iMX7 Solo 256MB",
98 [33] = "Colibri iMX7 Dual 512MB",
99 [34] = "Apalis TK1 2GB",
100 [35] = "Apalis iMX6 Dual 1GB IT",
Stefan Agner01875e92018-05-30 19:01:47 +0200101 [36] = "Colibri iMX6ULL 256MB",
Marcel Ziswiler2658c8e2019-04-09 17:25:32 +0200102 [37] = "Apalis iMX8 QuadMax 4GB Wi-Fi / BT IT",
103 [38] = "Colibri iMX8 QuadXPlus 2GB Wi-Fi / BT IT",
Stefan Agner01875e92018-05-30 19:01:47 +0200104 [39] = "Colibri iMX7 Dual 1GB (eMMC)",
Marcel Ziswiler2658c8e2019-04-09 17:25:32 +0200105 [40] = "Colibri iMX6ULL 512MB Wi-Fi / BT IT",
Stefan Agner01875e92018-05-30 19:01:47 +0200106 [41] = "Colibri iMX7 Dual 512MB EPDC",
107 [42] = "Apalis TK1 4GB",
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200108 [43] = "Colibri T20 512MB IT SETEK",
109 [44] = "Colibri iMX6ULL 512MB IT",
110 [45] = "Colibri iMX6ULL 512MB Wi-Fi / Bluetooth",
Marcel Ziswilerf60ffec2019-04-09 17:25:33 +0200111 [46] = "Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT",
112 [47] = "Apalis iMX8 QuadMax 4GB IT",
113 [48] = "Apalis iMX8 QuadPlus 2GB Wi-Fi / BT",
114 [49] = "Apalis iMX8 QuadPlus 2GB",
115 [50] = "Colibri iMX8 QuadXPlus 2GB IT",
116 [51] = "Colibri iMX8 DualX 1GB Wi-Fi / Bluetooth",
117 [52] = "Colibri iMX8 DualX 1GB",
Marcel Ziswiler75b93272020-01-28 14:42:23 +0100118 [53] = "Apalis iMX8 QuadXPlus 2GB ECC IT",
119 [54] = "Apalis iMX8 DualXPlus 1GB",
Marcel Ziswilereca26ba2020-01-28 14:42:24 +0100120 [55] = "Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT",
121 [56] = "Verdin iMX8M Nano SoloLite 1GB", /* not currently on sale */
122 [57] = "Verdin iMX8M Mini DualLite 1GB",
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100123};
124
125#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC
126static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
127{
128 struct mmc *mmc;
129 int dev = CONFIG_TDX_CFG_BLOCK_DEV;
130 int offset = CONFIG_TDX_CFG_BLOCK_OFFSET;
131 uint part = CONFIG_TDX_CFG_BLOCK_PART;
132 uint blk_start;
133 int ret = 0;
134
135 /* Read production parameter config block from eMMC */
136 mmc = find_mmc_device(dev);
137 if (!mmc) {
138 puts("No MMC card found\n");
139 ret = -ENODEV;
140 goto out;
141 }
Stefan Agnerdd202342019-07-12 12:35:05 +0200142 if (mmc_init(mmc)) {
143 puts("MMC init failed\n");
144 return -EINVAL;
145 }
Simon Glass8c4c5c82017-04-23 20:02:11 -0600146 if (part != mmc_get_blk_desc(mmc)->hwpart) {
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100147 if (blk_select_hwpart_devnum(IF_TYPE_MMC, dev, part)) {
148 puts("MMC partition switch failed\n");
149 ret = -ENODEV;
150 goto out;
151 }
152 }
153 if (offset < 0)
154 offset += mmc->capacity;
155 blk_start = ALIGN(offset, mmc->write_bl_len) / mmc->write_bl_len;
156
157 if (!write) {
158 /* Careful reads a whole block of 512 bytes into config_block */
159 if (blk_dread(mmc_get_blk_desc(mmc), blk_start, 1,
160 (unsigned char *)config_block) != 1) {
161 ret = -EIO;
162 goto out;
163 }
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100164 } else {
165 /* Just writing one 512 byte block */
166 if (blk_dwrite(mmc_get_blk_desc(mmc), blk_start, 1,
167 (unsigned char *)config_block) != 1) {
168 ret = -EIO;
169 goto out;
170 }
171 }
172
173out:
174 /* Switch back to regular eMMC user partition */
175 blk_select_hwpart_devnum(IF_TYPE_MMC, 0, 0);
176
177 return ret;
178}
179#endif
180
181#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NAND
182static int read_tdx_cfg_block_from_nand(unsigned char *config_block)
183{
184 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
Stefan Agner8843b6d2018-08-06 09:19:18 +0200185 struct mtd_info *mtd = get_nand_dev_by_index(0);
186
187 if (!mtd)
188 return -ENODEV;
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100189
190 /* Read production parameter config block from NAND page */
Stefan Agner8843b6d2018-08-06 09:19:18 +0200191 return nand_read_skip_bad(mtd, CONFIG_TDX_CFG_BLOCK_OFFSET,
Grygorii Strashkobb314622017-06-26 19:13:06 -0500192 &size, NULL, TDX_CFG_BLOCK_MAX_SIZE,
193 config_block);
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100194}
195
196static int write_tdx_cfg_block_to_nand(unsigned char *config_block)
197{
198 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
199
200 /* Write production parameter config block to NAND page */
Grygorii Strashkobb314622017-06-26 19:13:06 -0500201 return nand_write_skip_bad(get_nand_dev_by_index(0),
202 CONFIG_TDX_CFG_BLOCK_OFFSET,
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100203 &size, NULL, TDX_CFG_BLOCK_MAX_SIZE,
204 config_block, WITH_WR_VERIFY);
205}
206#endif
207
208#ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_NOR
209static int read_tdx_cfg_block_from_nor(unsigned char *config_block)
210{
211 /* Read production parameter config block from NOR flash */
212 memcpy(config_block, (void *)CONFIG_TDX_CFG_BLOCK_OFFSET,
213 TDX_CFG_BLOCK_MAX_SIZE);
214 return 0;
215}
216
217static int write_tdx_cfg_block_to_nor(unsigned char *config_block)
218{
219 /* Write production parameter config block to NOR flash */
220 return flash_write((void *)config_block, CONFIG_TDX_CFG_BLOCK_OFFSET,
221 TDX_CFG_BLOCK_MAX_SIZE);
222}
223#endif
224
225int read_tdx_cfg_block(void)
226{
227 int ret = 0;
228 u8 *config_block = NULL;
229 struct toradex_tag *tag;
230 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
231 int offset;
232
233 /* Allocate RAM area for config block */
234 config_block = memalign(ARCH_DMA_MINALIGN, size);
235 if (!config_block) {
236 printf("Not enough malloc space available!\n");
237 return -ENOMEM;
238 }
239
240 memset(config_block, 0, size);
241
242#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
243 ret = tdx_cfg_block_mmc_storage(config_block, 0);
244#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
245 ret = read_tdx_cfg_block_from_nand(config_block);
246#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
247 ret = read_tdx_cfg_block_from_nor(config_block);
248#else
249 ret = -EINVAL;
250#endif
251 if (ret)
252 goto out;
253
254 /* Expect a valid tag first */
255 tag = (struct toradex_tag *)config_block;
256 if (tag->flags != TAG_FLAG_VALID || tag->id != TAG_VALID) {
257 valid_cfgblock = false;
258 ret = -EINVAL;
259 goto out;
260 }
261 valid_cfgblock = true;
262 offset = 4;
263
264 while (offset < TDX_CFG_BLOCK_MAX_SIZE) {
265 tag = (struct toradex_tag *)(config_block + offset);
266 offset += 4;
267 if (tag->id == TAG_INVALID)
268 break;
269
270 if (tag->flags == TAG_FLAG_VALID) {
271 switch (tag->id) {
272 case TAG_MAC:
273 memcpy(&tdx_eth_addr, config_block + offset,
274 6);
275
276 /* NIC part of MAC address is serial number */
277 tdx_serial = ntohl(tdx_eth_addr.nic) >> 8;
278 break;
279 case TAG_HW:
280 memcpy(&tdx_hw_tag, config_block + offset, 8);
281 break;
282 }
283 }
284
285 /* Get to next tag according to current tags length */
286 offset += tag->len * 4;
287 }
288
289 /* Cap product id to avoid issues with a yet unknown one */
Marcel Ziswiler8c9127c2019-03-25 17:18:29 +0100290 if (tdx_hw_tag.prodid >= (sizeof(toradex_modules) /
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100291 sizeof(toradex_modules[0])))
292 tdx_hw_tag.prodid = 0;
293
294out:
295 free(config_block);
296 return ret;
297}
298
299static int get_cfgblock_interactive(void)
300{
301 char message[CONFIG_SYS_CBSIZE];
302 char *soc;
303 char it = 'n';
Marcel Ziswiler35e3c6e2019-07-12 12:35:06 +0200304 char wb = 'n';
Marcel Ziswilereca26ba2020-01-28 14:42:24 +0100305 int len = 0;
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100306
Stefan Agner68f58782019-04-09 17:24:08 +0200307 /* Unknown module by default */
308 tdx_hw_tag.prodid = 0;
309
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100310 if (cpu_is_pxa27x())
311 sprintf(message, "Is the module the 312 MHz version? [y/N] ");
Marcel Ziswilereca26ba2020-01-28 14:42:24 +0100312#if !defined(CONFIG_TARGET_VERDIN_IMX8MM) || !defined(CONFIG_TARGET_VERDIN_IMX8MN)
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100313 else
314 sprintf(message, "Is the module an IT version? [y/N] ");
Marcel Ziswilereca26ba2020-01-28 14:42:24 +0100315
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100316 len = cli_readline(message);
317 it = console_buffer[0];
Marcel Ziswilereca26ba2020-01-28 14:42:24 +0100318#else
319 else
320 it = 'y';
321#endif
322
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100323
Marcel Ziswiler35e3c6e2019-07-12 12:35:06 +0200324#if defined(CONFIG_TARGET_APALIS_IMX8) || \
Marcel Ziswiler75b93272020-01-28 14:42:23 +0100325 defined(CONFIG_TARGET_APALIS_IMX8X) || \
Marcel Ziswiler35e3c6e2019-07-12 12:35:06 +0200326 defined(CONFIG_TARGET_COLIBRI_IMX6ULL) || \
327 defined(CONFIG_TARGET_COLIBRI_IMX8X)
328 sprintf(message, "Does the module have Wi-Fi / Bluetooth? [y/N] ");
329 len = cli_readline(message);
330 wb = console_buffer[0];
331#endif
332
Simon Glass64b723f2017-08-03 12:22:12 -0600333 soc = env_get("soc");
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100334 if (!strcmp("mx6", soc)) {
Stefan Agner68f58782019-04-09 17:24:08 +0200335#ifdef CONFIG_TARGET_APALIS_IMX6
336 if (it == 'y' || it == 'Y') {
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100337 if (is_cpu_type(MXC_CPU_MX6Q))
338 tdx_hw_tag.prodid = APALIS_IMX6Q_IT;
339 else
340 tdx_hw_tag.prodid = APALIS_IMX6D_IT;
Stefan Agner68f58782019-04-09 17:24:08 +0200341 } else {
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100342 if (is_cpu_type(MXC_CPU_MX6Q))
343 tdx_hw_tag.prodid = APALIS_IMX6Q;
344 else
345 tdx_hw_tag.prodid = APALIS_IMX6D;
Stefan Agner68f58782019-04-09 17:24:08 +0200346 }
347#elif CONFIG_TARGET_COLIBRI_IMX6
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200348 if (it == 'y' || it == 'Y') {
Stefan Agner68f58782019-04-09 17:24:08 +0200349 if (is_cpu_type(MXC_CPU_MX6DL))
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100350 tdx_hw_tag.prodid = COLIBRI_IMX6DL_IT;
Stefan Agner68f58782019-04-09 17:24:08 +0200351 else if (is_cpu_type(MXC_CPU_MX6SOLO))
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100352 tdx_hw_tag.prodid = COLIBRI_IMX6S_IT;
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200353 } else {
Stefan Agner68f58782019-04-09 17:24:08 +0200354 if (is_cpu_type(MXC_CPU_MX6DL))
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100355 tdx_hw_tag.prodid = COLIBRI_IMX6DL;
Stefan Agner68f58782019-04-09 17:24:08 +0200356 else if (is_cpu_type(MXC_CPU_MX6SOLO))
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100357 tdx_hw_tag.prodid = COLIBRI_IMX6S;
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200358 }
Stefan Agner68f58782019-04-09 17:24:08 +0200359#elif CONFIG_TARGET_COLIBRI_IMX6ULL
Stefan Agner68f58782019-04-09 17:24:08 +0200360 if (it == 'y' || it == 'Y') {
361 if (wb == 'y' || wb == 'Y')
362 tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT_IT;
363 else
364 tdx_hw_tag.prodid = COLIBRI_IMX6ULL_IT;
365 } else {
366 if (wb == 'y' || wb == 'Y')
367 tdx_hw_tag.prodid = COLIBRI_IMX6ULL_WIFI_BT;
368 else
369 tdx_hw_tag.prodid = COLIBRI_IMX6ULL;
370 }
371#endif
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200372 } else if (!strcmp("imx7d", soc))
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100373 tdx_hw_tag.prodid = COLIBRI_IMX7D;
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200374 else if (!strcmp("imx7s", soc))
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100375 tdx_hw_tag.prodid = COLIBRI_IMX7S;
Marcel Ziswilereca26ba2020-01-28 14:42:24 +0100376 else if (is_cpu_type(MXC_CPU_IMX8MM))
377 tdx_hw_tag.prodid = VERDIN_IMX8MMQ_WIFI_BT_IT;
378 else if (is_cpu_type(MXC_CPU_IMX8MMDL))
379 tdx_hw_tag.prodid = VERDIN_IMX8MMDL;
380 else if (is_cpu_type(MXC_CPU_IMX8MN))
381 tdx_hw_tag.prodid = VERDIN_IMX8MNSL;
Marcel Ziswiler00320612019-07-12 12:35:08 +0200382 else if (is_cpu_type(MXC_CPU_IMX8QM)) {
383 if (it == 'y' || it == 'Y') {
384 if (wb == 'y' || wb == 'Y')
385 tdx_hw_tag.prodid = APALIS_IMX8QM_WIFI_BT_IT;
386 else
387 tdx_hw_tag.prodid = APALIS_IMX8QM_IT;
388 } else {
389 if (wb == 'y' || wb == 'Y')
390 tdx_hw_tag.prodid = APALIS_IMX8QP_WIFI_BT;
391 else
392 tdx_hw_tag.prodid = APALIS_IMX8QP;
393 }
394 } else if (is_cpu_type(MXC_CPU_IMX8QXP)) {
Marcel Ziswiler75b93272020-01-28 14:42:23 +0100395#ifdef CONFIG_TARGET_APALIS_IMX8X
396 if (it == 'y' || it == 'Y' || wb == 'y' || wb == 'Y') {
397 tdx_hw_tag.prodid = APALIS_IMX8QXP_WIFI_BT_IT;
398 } else {
399 if (gd->ram_size == 0x40000000)
400 tdx_hw_tag.prodid = APALIS_IMX8DXP;
401 else
402 tdx_hw_tag.prodid = APALIS_IMX8QXP;
403 }
404#elif CONFIG_TARGET_COLIBRI_IMX8X
Marcel Ziswiler7e2954f2019-07-12 12:35:07 +0200405 if (it == 'y' || it == 'Y') {
406 if (wb == 'y' || wb == 'Y')
407 tdx_hw_tag.prodid = COLIBRI_IMX8QXP_WIFI_BT_IT;
408 else
409 tdx_hw_tag.prodid = COLIBRI_IMX8QXP_IT;
410 } else {
411 if (wb == 'y' || wb == 'Y')
412 tdx_hw_tag.prodid = COLIBRI_IMX8DX_WIFI_BT;
413 else
414 tdx_hw_tag.prodid = COLIBRI_IMX8DX;
415 }
Marcel Ziswiler75b93272020-01-28 14:42:23 +0100416#endif
Marcel Ziswiler7e2954f2019-07-12 12:35:07 +0200417 } else if (!strcmp("tegra20", soc)) {
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100418 if (it == 'y' || it == 'Y')
419 if (gd->ram_size == 0x10000000)
420 tdx_hw_tag.prodid = COLIBRI_T20_256MB_IT;
421 else
422 tdx_hw_tag.prodid = COLIBRI_T20_512MB_IT;
423 else
424 if (gd->ram_size == 0x10000000)
425 tdx_hw_tag.prodid = COLIBRI_T20_256MB;
426 else
427 tdx_hw_tag.prodid = COLIBRI_T20_512MB;
428 } else if (cpu_is_pxa27x()) {
429 if (it == 'y' || it == 'Y')
430 tdx_hw_tag.prodid = COLIBRI_PXA270_312MHZ;
431 else
432 tdx_hw_tag.prodid = COLIBRI_PXA270_520MHZ;
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200433 }
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100434#ifdef CONFIG_MACH_TYPE
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200435 else if (!strcmp("tegra30", soc)) {
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100436 if (CONFIG_MACH_TYPE == MACH_TYPE_APALIS_T30) {
437 if (it == 'y' || it == 'Y')
438 tdx_hw_tag.prodid = APALIS_T30_IT;
439 else
440 if (gd->ram_size == 0x40000000)
441 tdx_hw_tag.prodid = APALIS_T30_1GB;
442 else
443 tdx_hw_tag.prodid = APALIS_T30_2GB;
444 } else {
445 if (it == 'y' || it == 'Y')
446 tdx_hw_tag.prodid = COLIBRI_T30_IT;
447 else
448 tdx_hw_tag.prodid = COLIBRI_T30;
449 }
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200450 }
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100451#endif /* CONFIG_MACH_TYPE */
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200452 else if (!strcmp("tegra124", soc)) {
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100453 tdx_hw_tag.prodid = APALIS_TK1_2GB;
454 } else if (!strcmp("vf500", soc)) {
455 if (it == 'y' || it == 'Y')
456 tdx_hw_tag.prodid = COLIBRI_VF50_IT;
457 else
458 tdx_hw_tag.prodid = COLIBRI_VF50;
459 } else if (!strcmp("vf610", soc)) {
460 if (it == 'y' || it == 'Y')
461 tdx_hw_tag.prodid = COLIBRI_VF61_IT;
462 else
463 tdx_hw_tag.prodid = COLIBRI_VF61;
Stefan Agner68f58782019-04-09 17:24:08 +0200464 }
465
466 if (!tdx_hw_tag.prodid) {
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100467 printf("Module type not detectable due to unknown SoC\n");
468 return -1;
469 }
470
471 while (len < 4) {
472 sprintf(message, "Enter the module version (e.g. V1.1B): V");
473 len = cli_readline(message);
474 }
475
476 tdx_hw_tag.ver_major = console_buffer[0] - '0';
477 tdx_hw_tag.ver_minor = console_buffer[2] - '0';
478 tdx_hw_tag.ver_assembly = console_buffer[3] - 'A';
479
Gerard Salvatella5ab3b1d2019-04-09 17:24:07 +0200480 if (cpu_is_pxa27x() && tdx_hw_tag.ver_major == 1)
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100481 tdx_hw_tag.prodid -= (COLIBRI_PXA270_312MHZ -
482 COLIBRI_PXA270_V1_312MHZ);
483
484 while (len < 8) {
485 sprintf(message, "Enter module serial number: ");
486 len = cli_readline(message);
487 }
488
489 tdx_serial = simple_strtoul(console_buffer, NULL, 10);
490
491 return 0;
492}
493
494static int get_cfgblock_barcode(char *barcode)
495{
496 if (strlen(barcode) < 16) {
497 printf("Argument too short, barcode is 16 chars long\n");
498 return -1;
499 }
500
501 /* Get hardware information from the first 8 digits */
502 tdx_hw_tag.ver_major = barcode[4] - '0';
503 tdx_hw_tag.ver_minor = barcode[5] - '0';
504 tdx_hw_tag.ver_assembly = barcode[7] - '0';
505
506 barcode[4] = '\0';
507 tdx_hw_tag.prodid = simple_strtoul(barcode, NULL, 10);
508
509 /* Parse second part of the barcode (serial number */
510 barcode += 8;
511 tdx_serial = simple_strtoul(barcode, NULL, 10);
512
513 return 0;
514}
515
516static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc,
517 char * const argv[])
518{
519 u8 *config_block;
520 struct toradex_tag *tag;
521 size_t size = TDX_CFG_BLOCK_MAX_SIZE;
522 int offset = 0;
523 int ret = CMD_RET_SUCCESS;
524 int err;
Dominik Sliwaf1e10592019-03-25 17:18:27 +0100525 int force_overwrite = 0;
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100526
527 /* Allocate RAM area for config block */
528 config_block = memalign(ARCH_DMA_MINALIGN, size);
529 if (!config_block) {
530 printf("Not enough malloc space available!\n");
531 return CMD_RET_FAILURE;
532 }
533
534 memset(config_block, 0xff, size);
535
Dominik Sliwaf1e10592019-03-25 17:18:27 +0100536 if (argc >= 3) {
537 if (argv[2][0] == '-' && argv[2][1] == 'y')
538 force_overwrite = 1;
539 }
540
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100541 read_tdx_cfg_block();
542 if (valid_cfgblock) {
543#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
544 /*
545 * On NAND devices, recreation is only allowed if the page is
546 * empty (config block invalid...)
547 */
Marcel Ziswiler6cf2f782019-07-12 12:35:09 +0200548 printf("NAND erase block %d need to be erased before creating a Toradex config block\n",
Grygorii Strashkobb314622017-06-26 19:13:06 -0500549 CONFIG_TDX_CFG_BLOCK_OFFSET /
550 get_nand_dev_by_index(0)->erasesize);
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100551 goto out;
552#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
553 /*
554 * On NOR devices, recreation is only allowed if the sector is
555 * empty and write protection is off (config block invalid...)
556 */
Marcel Ziswiler6cf2f782019-07-12 12:35:09 +0200557 printf("NOR sector at offset 0x%02x need to be erased and unprotected before creating a Toradex config block\n",
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100558 CONFIG_TDX_CFG_BLOCK_OFFSET);
559 goto out;
560#else
Dominik Sliwaf1e10592019-03-25 17:18:27 +0100561 if (!force_overwrite) {
562 char message[CONFIG_SYS_CBSIZE];
563
564 sprintf(message,
565 "A valid Toradex config block is present, still recreate? [y/N] ");
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100566
Dominik Sliwaf1e10592019-03-25 17:18:27 +0100567 if (!cli_readline(message))
568 goto out;
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100569
Dominik Sliwaf1e10592019-03-25 17:18:27 +0100570 if (console_buffer[0] != 'y' &&
571 console_buffer[0] != 'Y')
572 goto out;
573 }
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100574#endif
575 }
576
577 /* Parse new Toradex config block data... */
Dominik Sliwaf1e10592019-03-25 17:18:27 +0100578 if (argc < 3 || (force_overwrite && argc < 4)) {
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100579 err = get_cfgblock_interactive();
Dominik Sliwaf1e10592019-03-25 17:18:27 +0100580 } else {
581 if (force_overwrite)
582 err = get_cfgblock_barcode(argv[3]);
583 else
584 err = get_cfgblock_barcode(argv[2]);
585 }
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100586 if (err) {
587 ret = CMD_RET_FAILURE;
588 goto out;
589 }
590
591 /* Convert serial number to MAC address (the storage format) */
592 tdx_eth_addr.oui = htonl(0x00142dUL << 8);
593 tdx_eth_addr.nic = htonl(tdx_serial << 8);
594
595 /* Valid Tag */
596 tag = (struct toradex_tag *)config_block;
597 tag->id = TAG_VALID;
598 tag->flags = TAG_FLAG_VALID;
599 tag->len = 0;
600 offset += 4;
601
602 /* Product Tag */
603 tag = (struct toradex_tag *)(config_block + offset);
604 tag->id = TAG_HW;
605 tag->flags = TAG_FLAG_VALID;
606 tag->len = 2;
607 offset += 4;
608
609 memcpy(config_block + offset, &tdx_hw_tag, 8);
610 offset += 8;
611
612 /* MAC Tag */
613 tag = (struct toradex_tag *)(config_block + offset);
614 tag->id = TAG_MAC;
615 tag->flags = TAG_FLAG_VALID;
616 tag->len = 2;
617 offset += 4;
618
619 memcpy(config_block + offset, &tdx_eth_addr, 6);
620 offset += 6;
621 memset(config_block + offset, 0, 32 - offset);
622
623#if defined(CONFIG_TDX_CFG_BLOCK_IS_IN_MMC)
624 err = tdx_cfg_block_mmc_storage(config_block, 1);
625#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NAND)
626 err = write_tdx_cfg_block_to_nand(config_block);
627#elif defined(CONFIG_TDX_CFG_BLOCK_IS_IN_NOR)
628 err = write_tdx_cfg_block_to_nor(config_block);
629#else
630 err = -EINVAL;
631#endif
632 if (err) {
633 printf("Failed to write Toradex config block: %d\n", ret);
634 ret = CMD_RET_FAILURE;
635 goto out;
636 }
637
638 printf("Toradex config block successfully written\n");
639
640out:
641 free(config_block);
642 return ret;
643}
644
645static int do_cfgblock(cmd_tbl_t *cmdtp, int flag, int argc,
646 char * const argv[])
647{
648 int ret;
649
650 if (argc < 2)
651 return CMD_RET_USAGE;
652
653 if (!strcmp(argv[1], "create")) {
654 return do_cfgblock_create(cmdtp, flag, argc, argv);
655 } else if (!strcmp(argv[1], "reload")) {
656 ret = read_tdx_cfg_block();
657 if (ret) {
658 printf("Failed to reload Toradex config block: %d\n",
659 ret);
660 return CMD_RET_FAILURE;
661 }
662 return CMD_RET_SUCCESS;
663 }
664
665 return CMD_RET_USAGE;
666}
667
Marcel Ziswiler6cf2f782019-07-12 12:35:09 +0200668U_BOOT_CMD(cfgblock, 4, 0, do_cfgblock,
669 "Toradex config block handling commands",
670 "create [-y] [barcode] - (Re-)create Toradex config block\n"
671 "cfgblock reload - Reload Toradex config block from flash"
Marcel Ziswiler7a28dfc2016-11-16 17:49:22 +0100672);