Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2011 Freescale Semiconductor, Inc. |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | 284f71b | 2019-12-28 10:44:45 -0700 | [diff] [blame] | 7 | #include <init.h> |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 8 | #include <ns16550.h> |
| 9 | #include <asm/io.h> |
| 10 | #include <nand.h> |
| 11 | #include <asm/fsl_law.h> |
York Sun | f062659 | 2013-09-30 09:22:09 -0700 | [diff] [blame] | 12 | #include <fsl_ddr_sdram.h> |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 13 | |
| 14 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 15 | const static u32 sysclk_tbl[] = { |
| 16 | 66666000, 7499900, 83332500, 8999900, |
| 17 | 99999000, 11111000, 12499800, 13333200 |
| 18 | }; |
| 19 | |
| 20 | void board_init_f(ulong bootflag) |
| 21 | { |
| 22 | int px_spd; |
| 23 | u32 plat_ratio, sys_clk, bus_clk; |
| 24 | ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; |
| 25 | |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 26 | #if defined(CONFIG_SYS_NAND_BR_PRELIM) && defined(CONFIG_SYS_NAND_OR_PRELIM) |
| 27 | set_lbc_br(0, CONFIG_SYS_NAND_BR_PRELIM); |
| 28 | set_lbc_or(0, CONFIG_SYS_NAND_OR_PRELIM); |
| 29 | #endif |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 30 | /* for FPGA */ |
| 31 | set_lbc_br(2, CONFIG_SYS_BR2_PRELIM); |
| 32 | set_lbc_or(2, CONFIG_SYS_OR2_PRELIM); |
| 33 | |
| 34 | /* initialize selected port with appropriate baud rate */ |
| 35 | px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); |
| 36 | sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK]; |
| 37 | plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; |
| 38 | bus_clk = sys_clk * plat_ratio / 2; |
| 39 | |
| 40 | NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, |
| 41 | bus_clk / 16 / CONFIG_BAUDRATE); |
| 42 | |
| 43 | puts("\nNAND boot... "); |
| 44 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 45 | /* copy code to RAM and jump to it - this should not return */ |
| 46 | /* NOTE - code has to be copied out of NAND buffer before |
| 47 | * other blocks can be read. |
| 48 | */ |
| 49 | relocate_code(CONFIG_SPL_RELOC_STACK, 0, |
| 50 | CONFIG_SPL_RELOC_TEXT_BASE); |
| 51 | } |
| 52 | |
| 53 | void board_init_r(gd_t *gd, ulong dest_addr) |
| 54 | { |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 55 | puts("\nSecond program loader running in sram..."); |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 56 | nand_boot(); |
| 57 | } |
| 58 | |
| 59 | void putc(char c) |
| 60 | { |
| 61 | if (c == '\n') |
| 62 | NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); |
| 63 | |
| 64 | NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); |
| 65 | } |
| 66 | |
| 67 | void puts(const char *str) |
| 68 | { |
| 69 | while (*str) |
| 70 | putc(*str++); |
| 71 | } |