Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2011-2012 |
Pali Rohár | 10a953d | 2020-04-01 00:35:08 +0200 | [diff] [blame] | 4 | * Pali Rohár <pali@kernel.org> |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 5 | * |
| 6 | * (C) Copyright 2010 |
| 7 | * Alistair Buxton <a.j.buxton@gmail.com> |
| 8 | * |
| 9 | * Derived from Beagle Board code: |
| 10 | * (C) Copyright 2006-2008 |
| 11 | * Texas Instruments. |
| 12 | * Richard Woodruff <r-woodruff2@ti.com> |
| 13 | * Syed Mohammed Khasim <x0khasim@ti.com> |
| 14 | * |
| 15 | * Configuration settings for the Nokia RX-51 aka N900. |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #ifndef __CONFIG_H |
| 19 | #define __CONFIG_H |
| 20 | |
| 21 | /* |
| 22 | * High Level Configuration Options |
| 23 | */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 24 | #define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */ |
| 25 | |
| 26 | #define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51 |
| 27 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 28 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
Nishanth Menon | fa96c96 | 2015-03-09 17:12:04 -0500 | [diff] [blame] | 29 | #include <asm/arch/omap.h> |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 30 | #include <asm/arch/mem.h> |
| 31 | #include <linux/stringify.h> |
| 32 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 33 | /* Clock Defines */ |
| 34 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 35 | #define V_SCLK (V_OSCK >> 1) |
| 36 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 37 | #define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */ |
| 38 | |
| 39 | #define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */ |
| 40 | #define CONFIG_INITRD_TAG /* enable passing initrd */ |
| 41 | #define CONFIG_REVISION_TAG /* enable passing revision tag*/ |
| 42 | #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ |
| 43 | |
| 44 | /* |
| 45 | * Size of malloc() pool |
| 46 | */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 47 | #define CONFIG_UBI_SIZE (512 << 10) |
| 48 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \ |
| 49 | (128 << 10)) |
| 50 | |
| 51 | /* |
| 52 | * Hardware drivers |
| 53 | */ |
| 54 | |
| 55 | /* |
| 56 | * NS16550 Configuration |
| 57 | */ |
| 58 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 59 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 60 | #define CONFIG_SYS_NS16550_SERIAL |
| 61 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 62 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
| 63 | |
| 64 | /* |
| 65 | * select serial console configuration |
| 66 | */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 67 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 68 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 69 | #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 70 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 71 | /* USB device configuration */ |
| 72 | #define CONFIG_USB_DEVICE |
Pali Rohár | bba0bba | 2021-02-20 11:50:15 +0100 | [diff] [blame] | 73 | #define CONFIG_USB_TTY |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 74 | #define CONFIG_USBD_VENDORID 0x0421 |
Pali Rohár | bba0bba | 2021-02-20 11:50:15 +0100 | [diff] [blame] | 75 | #define CONFIG_USBD_PRODUCTID_CDCACM 0x01c8 |
| 76 | #define CONFIG_USBD_PRODUCTID_GSERIAL 0x01c8 |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 77 | #define CONFIG_USBD_MANUFACTURER "Nokia" |
Pali Rohár | bba0bba | 2021-02-20 11:50:15 +0100 | [diff] [blame] | 78 | #define CONFIG_USBD_PRODUCT_NAME "N900 (U-Boot)" |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 79 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 80 | #define GPIO_SLIDE 71 |
| 81 | |
| 82 | /* |
| 83 | * Board ONENAND Info. |
| 84 | */ |
| 85 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 86 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 87 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 88 | /* |
| 89 | * Framebuffer |
| 90 | */ |
| 91 | /* Video console */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 92 | #define CONFIG_VIDEO_LOGO |
| 93 | #define VIDEO_FB_16BPP_PIXEL_SWAP |
| 94 | #define VIDEO_FB_16BPP_WORD_SWAP |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 95 | |
| 96 | /* functions for cfb_console */ |
| 97 | #define VIDEO_KBD_INIT_FCT rx51_kp_init() |
| 98 | #define VIDEO_TSTC_FCT rx51_kp_tstc |
| 99 | #define VIDEO_GETC_FCT rx51_kp_getc |
| 100 | #ifndef __ASSEMBLY__ |
Simon Glass | 0d1e1f7 | 2014-07-23 06:54:59 -0600 | [diff] [blame] | 101 | struct stdio_dev; |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 102 | int rx51_kp_init(void); |
Simon Glass | 0d1e1f7 | 2014-07-23 06:54:59 -0600 | [diff] [blame] | 103 | int rx51_kp_tstc(struct stdio_dev *sdev); |
| 104 | int rx51_kp_getc(struct stdio_dev *sdev); |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 105 | #endif |
| 106 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 107 | /* Environment information */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 108 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 109 | "usbtty=cdc_acm\0" \ |
Pali Rohár | bba0bba | 2021-02-20 11:50:15 +0100 | [diff] [blame] | 110 | "stdin=usbtty,serial,vga\0" \ |
| 111 | "stdout=usbtty,serial,vga\0" \ |
| 112 | "stderr=usbtty,serial,vga\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 113 | "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \ |
| 114 | "switchmmc=mmc dev ${mmcnum}\0" \ |
| 115 | "kernaddr=0x82008000\0" \ |
| 116 | "initrdaddr=0x84008000\0" \ |
| 117 | "scriptaddr=0x86008000\0" \ |
| 118 | "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \ |
| 119 | "${loadaddr} ${mmcfile}\0" \ |
| 120 | "kernload=setenv loadaddr ${kernaddr};" \ |
| 121 | "setenv mmcfile ${mmckernfile};" \ |
| 122 | "run fileload\0" \ |
| 123 | "initrdload=setenv loadaddr ${initrdaddr};" \ |
| 124 | "setenv mmcfile ${mmcinitrdfile};" \ |
| 125 | "run fileload\0" \ |
| 126 | "scriptload=setenv loadaddr ${scriptaddr};" \ |
| 127 | "setenv mmcfile ${mmcscriptfile};" \ |
| 128 | "run fileload\0" \ |
| 129 | "scriptboot=echo Running ${mmcscriptfile} from mmc " \ |
| 130 | "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \ |
| 131 | "kernboot=echo Booting ${mmckernfile} from mmc " \ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 132 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} || " \ |
| 133 | "bootz ${kernaddr}\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 134 | "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 135 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr} || " \ |
| 136 | "bootz ${kernaddr} ${initrdaddr}\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 137 | "attachboot=echo Booting attached kernel image ...;" \ |
| 138 | "setenv setup_omap_atag 1;" \ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 139 | "bootm ${attkernaddr} || bootz ${attkernaddr};" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 140 | "setenv setup_omap_atag\0" \ |
Pali Rohár | 5e0f513 | 2021-06-18 15:27:04 +0200 | [diff] [blame] | 141 | "trymmcscriptboot=run switchmmc && run scriptload && run scriptboot\0" \ |
| 142 | "trymmckernboot=run switchmmc && run kernload && run kernboot\0" \ |
| 143 | "trymmckerninitrdboot=run switchmmc && run initrdload && " \ |
| 144 | "run kernload && run kerninitrdboot\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 145 | "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 146 | "setenv mmckernfile uImage; run trymmckernboot;" \ |
| 147 | "setenv mmckernfile zImage; run trymmckernboot\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 148 | "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \ |
| 149 | "setenv mmcpart 2; run trymmcpartboot;" \ |
| 150 | "setenv mmcpart 3; run trymmcpartboot;" \ |
| 151 | "setenv mmcpart 4; run trymmcpartboot\0" \ |
| 152 | "trymmcboot=if run switchmmc; then " \ |
| 153 | "setenv mmctype fat;" \ |
| 154 | "run trymmcallpartboot;" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 155 | "setenv mmctype ext4;" \ |
| 156 | "run trymmcallpartboot;" \ |
| 157 | "fi\0" \ |
| 158 | "emmcboot=setenv mmcnum 1; run trymmcboot\0" \ |
| 159 | "sdboot=setenv mmcnum 0; run trymmcboot\0" \ |
Pali Rohár | 5e0f513 | 2021-06-18 15:27:04 +0200 | [diff] [blame] | 160 | "trymmcbootmenu=setenv mmctype fat && run trymmcscriptboot || " \ |
| 161 | "setenv mmctype ext4 && run trymmcscriptboot\0" \ |
| 162 | "preboot=setenv mmcpart 1; setenv mmcscriptfile bootmenu.scr;" \ |
| 163 | "setenv mmcnum 0 && run trymmcbootmenu || " \ |
| 164 | "setenv mmcnum 1 && run trymmcbootmenu;" \ |
Pali Rohár | 6f52aee | 2020-04-01 00:35:11 +0200 | [diff] [blame] | 165 | "if run slide; then true; else " \ |
| 166 | "setenv bootmenu_delay 0;" \ |
| 167 | "setenv bootdelay 0;" \ |
| 168 | "fi\0" \ |
Pali Rohár | 13eb3e4 | 2013-03-07 05:15:19 +0000 | [diff] [blame] | 169 | "menucmd=bootmenu\0" \ |
| 170 | "bootmenu_0=Attached kernel=run attachboot\0" \ |
| 171 | "bootmenu_1=Internal eMMC=run emmcboot\0" \ |
| 172 | "bootmenu_2=External SD card=run sdboot\0" \ |
| 173 | "bootmenu_3=U-Boot boot order=boot\0" \ |
| 174 | "bootmenu_delay=30\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 175 | "" |
| 176 | |
Pali Rohár | 13eb3e4 | 2013-03-07 05:15:19 +0000 | [diff] [blame] | 177 | #define CONFIG_POSTBOOTMENU \ |
| 178 | "echo;" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 179 | "echo Extra commands:;" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 180 | "echo run sdboot - Boot from SD card slot.;" \ |
| 181 | "echo run emmcboot - Boot internal eMMC memory.;" \ |
| 182 | "echo run attachboot - Boot attached kernel image.;" \ |
| 183 | "echo" |
| 184 | |
| 185 | #define CONFIG_BOOTCOMMAND \ |
| 186 | "run sdboot;" \ |
| 187 | "run emmcboot;" \ |
| 188 | "run attachboot;" \ |
| 189 | "echo" |
| 190 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 191 | /* default load address */ |
| 192 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) |
| 193 | |
| 194 | /* |
| 195 | * OMAP3 has 12 GP timers, they can be driven by the system clock |
| 196 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 197 | * This rate is divided by a local divisor. |
| 198 | */ |
| 199 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
| 200 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 201 | |
| 202 | /* |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 203 | * Physical Memory Map |
| 204 | */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 205 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 206 | |
| 207 | /* |
| 208 | * FLASH and environment organization |
| 209 | */ |
| 210 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 211 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 212 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 213 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
| 214 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 215 | CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 216 | |
| 217 | /* |
| 218 | * Attached kernel image |
| 219 | */ |
| 220 | |
| 221 | #define SDRAM_SIZE 0x10000000 /* 256 MB */ |
| 222 | #define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE) |
| 223 | |
| 224 | #define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */ |
| 225 | #define KERNEL_OFFSET 0x40000 /* 256 kB */ |
| 226 | #define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET) |
| 227 | #define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE) |
| 228 | |
| 229 | /* Reserve protected RAM for attached kernel */ |
| 230 | #define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1) |
| 231 | |
| 232 | #endif /* __CONFIG_H */ |