blob: 15c50279ad931e66205a8a8ac46e6c8f011510f7 [file] [log] [blame]
Oliver Grauteaf5e29b2021-05-31 15:50:40 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2017-2018 NXP
4 * Copyright 2018 congatec AG
5 *
6 */
7
8#ifndef __CGTQMX8_H
9#define __CGTQMX8_H
10
11#include <linux/sizes.h>
12#include <asm/arch/imx-regs.h>
13
14#ifdef CONFIG_SPL_BUILD
15#define CONFIG_SPL_TEXT_BASE 0x0
16#define CONFIG_SPL_MAX_SIZE (124 * 1024)
17#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
18#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
19#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800
20
21#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
22#define CONFIG_SPL_STACK 0x013E000
23#define CONFIG_SPL_BSS_START_ADDR 0x00128000
24#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
25#define CONFIG_SYS_SPL_MALLOC_START 0x00120000
26#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */
27#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
28#define CONFIG_MALLOC_F_ADDR 0x00120000
29
30#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE
31
32#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
33
34#define CONFIG_OF_EMBED
35#endif
36
37#define CONFIG_REMAKE_ELF
38
39#define CONFIG_BOARD_EARLY_INIT_F
40
41/* Flat Device Tree Definitions */
42#define CONFIG_OF_BOARD_SETUP
43
44#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
45#define CONFIG_SYS_FSL_ESDHC_ADDR 0
46#define USDHC1_BASE_ADDR 0x5B010000
47#define USDHC2_BASE_ADDR 0x5B020000
48#define USDHC3_BASE_ADDR 0x5B030000
49#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
50
51#define CONFIG_ENV_OVERWRITE
52
53#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
54
55/* Boot M4 */
56#define M4_BOOT_ENV \
57 "m4_0_image=m4_0.bin\0" \
58 "m4_1_image=m4_1.bin\0" \
59 "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_0_image}\0" \
60 "loadm4image_1=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4_1_image}\0" \
61 "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
62 "m4boot_1=run loadm4image_1; dcache flush; bootaux ${loadaddr} 1\0" \
63
64#ifdef CONFIG_NAND_BOOT
65#define MFG_NAND_PARTITION "mtdparts=gpmi-nand:128m(boot),32m(kernel),16m(dtb),8m(misc),-(rootfs) "
66#else
67#define MFG_NAND_PARTITION ""
68#endif
69#define FEC0_RESET IMX_GPIO_NR(2, 5)
70#define FEC0_PDOMAIN "conn_enet0"
71
72#define CONFIG_MFG_ENV_SETTINGS \
73 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
74 "rdinit=/linuxrc " \
75 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
76 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
77 "g_mass_storage.iSerialNumber=\"\" "\
78 MFG_NAND_PARTITION \
79 "clk_ignore_unused "\
80 "\0" \
81 "initrd_addr=0x83800000\0" \
82 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
83
84/* Initial environment variables */
85#define CONFIG_EXTRA_ENV_SETTINGS \
86 CONFIG_MFG_ENV_SETTINGS \
87 M4_BOOT_ENV \
88 "script=boot.scr\0" \
89 "image=Image\0" \
90 "panel=NULL\0" \
91 "console=ttyLP0\0" \
92 "fdt_addr=0x83000000\0" \
93 "boot_fdt=try\0" \
94 "fdt_file=imx8qm-cgt-qmx8.dtb\0" \
95 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
96 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
97 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
98 "mmcautodetect=yes\0" \
99 "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
100 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
101 "bootscript=echo Running bootscript from mmc ...; " \
102 "source\0" \
103 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
104 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
105 "mmcboot=echo Booting from mmc ...; " \
106 "run mmcargs; " \
107 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
108 "if run loadfdt; then " \
109 "booti ${loadaddr} - ${fdt_addr}; " \
110 "else " \
111 "echo WARN: Cannot load the DT; " \
112 "fi; " \
113 "else " \
114 "echo wait for boot; " \
115 "fi;\0" \
116 "netargs=setenv bootargs console=${console},${baudrate} " \
117 "root=/dev/nfs " \
118 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp rw earlycon\0" \
119 "netboot=echo Booting from net ...; " \
120 "run netargs; " \
121 "if test ${ip_dyn} = yes; then " \
122 "setenv get_cmd dhcp; " \
123 "else " \
124 "setenv get_cmd tftp; " \
125 "fi; " \
126 "${get_cmd} ${loadaddr} ${image}; " \
127 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
128 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
129 "booti ${loadaddr} - ${fdt_addr}; " \
130 "else " \
131 "echo WARN: Cannot load the DT; " \
132 "fi; " \
133 "else " \
134 "booti; " \
135 "fi;\0"
136
137#define CONFIG_BOOTCOMMAND \
138 "mmc dev ${mmcdev}; if mmc rescan; then " \
139 "if run loadbootscript; then " \
140 "run bootscript; " \
141 "else " \
142 "if run loadimage; then " \
143 "run mmcboot; " \
144 "else run netboot; " \
145 "fi; " \
146 "fi; " \
147 "else booti ${loadaddr} - ${fdt_addr}; fi"
148
149/* Link Definitions */
150#define CONFIG_LOADADDR 0x80280000
151
152#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
153
154#define CONFIG_SYS_INIT_SP_ADDR 0x80200000
155
156#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
157
158#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
159#define CONFIG_SYS_FSL_USDHC_NUM 3
160
161/* Size of malloc() pool */
162#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
163
164#define CONFIG_SYS_SDRAM_BASE 0x80000000
165#define PHYS_SDRAM_1 0x80000000
166#define PHYS_SDRAM_2 0x880000000
167#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
168#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
169
170/* Serial */
171#define CONFIG_BAUDRATE 115200
172
173/* Generic Timer Definitions */
174#define COUNTER_FREQUENCY 8000000 /* 8MHz */
175
176/* Networking */
177#define CONFIG_FEC_MXC_PHYADDR -1
178#define CONFIG_FEC_XCV_TYPE RGMII
179#define FEC_QUIRK_ENET_MAC
180
181#endif /* __CGTQMX8_H */