Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 1cacf87b08ad5289eb3dc818f28471a393b465e8 / . / configs / stm32f769-disco_defconfig
blob: f151dab04fc044807149d3e5950fc6a7f409b742 [file] [log] [blame]
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]1CONFIG_ARM=y
Trevor Woerner2bcc1ed2020-05-06 08:02:42 -0400[diff] [blame]2CONFIG_ARCH_STM32=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x08008000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x100000
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0xE00
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]7CONFIG_ENV_SIZE=0x2000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]9CONFIG_SPL_TEXT_BASE=0x8000000
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]10CONFIG_STM32F7=y
11CONFIG_TARGET_STM32F746_DISCO=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]12CONFIG_SYS_LOAD_ADDR=0x8008000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]13CONFIG_DISTRO_DEFAULTS=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]14CONFIG_BOOTDELAY=3
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]15CONFIG_AUTOBOOT_KEYED=y
16CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
17CONFIG_AUTOBOOT_STOP_STR=" "
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]18CONFIG_USE_BOOTARGS=y
19CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]20# CONFIG_DISPLAY_CPUINFO is not set
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]21CONFIG_SYS_PROMPT="U-Boot > "
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]22CONFIG_CMD_GPT=y
23# CONFIG_RANDOM_UUID is not set
24CONFIG_CMD_MMC=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]25# CONFIG_CMD_SETEXPR is not set
26CONFIG_CMD_SNTP=y
27CONFIG_CMD_DNS=y
28CONFIG_CMD_LINK_LOCAL=y
29CONFIG_CMD_BMP=y
30CONFIG_CMD_CACHE=y
31CONFIG_CMD_TIMER=y
32# CONFIG_SPL_DOS_PARTITION is not set
33# CONFIG_ISO_PARTITION is not set
34# CONFIG_SPL_EFI_PARTITION is not set
35CONFIG_OF_CONTROL=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]36CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]37CONFIG_NET_RANDOM_ETHADDR=y
38CONFIG_NETCONSOLE=y
Tom Rini9b384002021-04-21 15:32:27 -0400[diff] [blame]39# CONFIG_SPL_BLK is not set
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]40# CONFIG_SPL_DM_MMC is not set
41CONFIG_ARM_PL180_MMCI=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]42CONFIG_MTD=y
Miquel Raynala903be42019-10-03 19:50:04 +0200[diff] [blame]43CONFIG_DM_MTD=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]44CONFIG_MTD_NOR_FLASH=y
Patrick Delaunay754ff3b2021-10-04 11:05:52 +0200[diff] [blame]45CONFIG_STM32_FLASH=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]46CONFIG_DM_SPI_FLASH=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]47CONFIG_SPI_FLASH_MACRONIX=y
48CONFIG_SPI_FLASH_STMICRO=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]49CONFIG_PHY_SMSC=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]50CONFIG_DM_ETH=y
51CONFIG_ETH_DESIGNWARE=y
52CONFIG_MII=y
53# CONFIG_PINCTRL_FULL is not set
54CONFIG_SPI=y
55CONFIG_DM_SPI=y
56CONFIG_STM32_QSPI=y
57CONFIG_DM_VIDEO=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]58CONFIG_BACKLIGHT_GPIO=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]59CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
60CONFIG_VIDEO_STM32=y
61CONFIG_VIDEO_STM32_DSI=y
62CONFIG_VIDEO_STM32_MAX_XRES=480
63CONFIG_VIDEO_STM32_MAX_YRES=800
Simon Glass2d7a7942020-08-11 11:23:35 -0600[diff] [blame]64CONFIG_SPLASH_SCREEN=y
65CONFIG_SPLASH_SCREEN_ALIGN=y
Patrick Delaunayc47fe772020-09-28 11:30:15 +0200[diff] [blame]66CONFIG_VIDEO_BMP_RLE8=y
Patrick Delaunayb1f17632020-09-28 11:30:16 +0200[diff] [blame]67CONFIG_BMP_16BPP=y
68CONFIG_BMP_24BPP=y
69CONFIG_BMP_32BPP=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]70CONFIG_OF_LIBFDT_OVERLAY=y