blob: dc7d83f61de9b324d8026bef45717acf802908e2 [file] [log] [blame]
Mike Frysinger5bf58842010-12-17 15:28:43 -05001/*
Bin Meng75574052016-02-05 19:30:11 -08002 * U-Boot - Configuration file for BF506F EZ-Kit board
Mike Frysinger5bf58842010-12-17 15:28:43 -05003 */
4
5#ifndef __CONFIG_BF506F_EZKIT_H__
6#define __CONFIG_BF506F_EZKIT_H__
7
8#include <asm/config-pre.h>
9
Mike Frysinger5bf58842010-12-17 15:28:43 -050010/*
11 * Processor Settings
12 */
13#define CONFIG_BFIN_CPU bf506-0.0
14#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
15
Mike Frysinger5bf58842010-12-17 15:28:43 -050016/*
17 * Clock Settings
18 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
19 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
20 */
21/* CONFIG_CLKIN_HZ is any value in Hz */
22#define CONFIG_CLKIN_HZ 25000000
23/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
24/* 1 = CLKIN / 2 */
25#define CONFIG_CLKIN_HALF 0
26/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
27/* 1 = bypass PLL */
28#define CONFIG_PLL_BYPASS 0
29/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
30/* Values can range from 0-63 (where 0 means 64) */
31#define CONFIG_VCO_MULT 16
32/* CCLK_DIV controls the core clock divider */
33/* Values can be 1, 2, 4, or 8 ONLY */
34#define CONFIG_CCLK_DIV 1
35/* SCLK_DIV controls the system clock divider */
36/* Values can range from 1-15 */
37#define CONFIG_SCLK_DIV 5
38
Mike Frysinger5bf58842010-12-17 15:28:43 -050039/*
40 * Memory Settings
41 */
42#define CONFIG_MEM_SIZE 0
43
44#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL)
45#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2
46#define CONFIG_EBIU_AMBCTL1_VAL 0xffc2ffc2
47
48#define CONFIG_SYS_MONITOR_BASE (L1_DATA_A_SRAM_END)
49#define CONFIG_SYS_MONITOR_LEN (4 * 1024)
50#define CONFIG_SYS_MALLOC_LEN (4 * 1024)
51
Mike Frysinger5bf58842010-12-17 15:28:43 -050052/*
53 * Flash Settings
54 */
Sonic Zhang3fbfdd12014-07-17 19:00:29 +080055/*
Mike Frysinger5bf58842010-12-17 15:28:43 -050056#define CONFIG_FLASH_CFI_DRIVER
57#define CONFIG_SYS_FLASH_BASE 0x20000000
58#define CONFIG_SYS_FLASH_CFI
59#define CONFIG_SYS_MAX_FLASH_BANKS 1
60#define CONFIG_SYS_MAX_FLASH_SECT 71
Mike Frysinger6b10ac22011-01-10 00:19:47 -050061#define CONFIG_MONITOR_IS_IN_RAM
Sonic Zhang34e05862013-12-09 12:38:56 +080062*/
Sonic Zhang3fbfdd12014-07-17 19:00:29 +080063#define CONFIG_SYS_NO_FLASH
Mike Frysinger5bf58842010-12-17 15:28:43 -050064
65/*
66 * SPI Settings
67 */
68#define CONFIG_BFIN_SPI
69#define CONFIG_ENV_SPI_MAX_HZ 30000000
70#define CONFIG_SF_DEFAULT_SPEED 30000000
Mike Frysinger5bf58842010-12-17 15:28:43 -050071
72/*
73 * Env Storage Settings
74 */
75#define CONFIG_ENV_IS_NOWHERE
76#define CONFIG_ENV_SIZE 0x400
Mike Frysinger5bf58842010-12-17 15:28:43 -050077
Mike Frysinger5bf58842010-12-17 15:28:43 -050078/*
79 * Misc Settings
80 */
81#define CONFIG_BOARD_EARLY_INIT_F
82#define CONFIG_ICACHE_OFF
83#define CONFIG_DCACHE_OFF
84#define CONFIG_UART_CONSOLE 0
85#define CONFIG_BAUDRATE 115200
Sonic Zhangb9efd352013-11-18 14:50:19 +080086#define CONFIG_BFIN_SERIAL
Mike Frysinger5bf58842010-12-17 15:28:43 -050087
Mike Frysinger5bf58842010-12-17 15:28:43 -050088#undef CONFIG_GZIP
89#undef CONFIG_ZLIB
Mike Frysinger5bf58842010-12-17 15:28:43 -050090#undef CONFIG_BOOTM_RTEMS
91#undef CONFIG_BOOTM_LINUX
92
93#endif