blob: c4db2a45c56196c0db721e2d277159e658b05bcd [file] [log] [blame]
Stephen Warren86815612015-08-13 22:34:22 -06001/dts-v1/;
2
3#include "tegra210.dtsi"
4
5/ {
6 model = "NVIDIA P2371-2180";
7 compatible = "nvidia,p2371-2180", "nvidia,tegra210";
8
9 chosen {
10 stdout-path = &uarta;
11 };
12
13 aliases {
14 i2c0 = "/i2c@0,7000d000";
15 sdhci0 = "/sdhci@0,700b0600";
16 sdhci1 = "/sdhci@0,700b0000";
17 usb0 = "/usb@0,7d000000";
18 };
19
20 memory {
21 reg = <0x0 0x80000000 0x0 0xc0000000>;
22 };
23
Stephen Warren16572fd2015-10-05 17:02:40 -060024 pcie-controller@0,01003000 {
25 status = "okay";
26
27 pci@1,0 {
28 status = "okay";
29 };
30
31 pci@2,0 {
32 status = "okay";
33 };
34 };
35
36 padctl@0,7009f000 {
37 pinctrl-0 = <&padctl_default>;
38 pinctrl-names = "default";
39
40 padctl_default: pinmux {
41 xusb {
42 nvidia,lanes = "otg-1", "otg-2";
43 nvidia,function = "xusb";
44 nvidia,iddq = <0>;
45 };
46
47 usb3 {
48 nvidia,lanes = "pcie-5", "pcie-6";
49 nvidia,function = "usb3";
50 nvidia,iddq = <0>;
51 };
52
53 pcie-x1 {
54 nvidia,lanes = "pcie-0";
55 nvidia,function = "pcie-x1";
56 nvidia,iddq = <0>;
57 };
58
59 pcie-x4 {
60 nvidia,lanes = "pcie-1", "pcie-2",
61 "pcie-3", "pcie-4";
62 nvidia,function = "pcie-x4";
63 nvidia,iddq = <0>;
64 };
65
66 sata {
67 nvidia,lanes = "sata-0";
68 nvidia,function = "sata";
69 nvidia,iddq = <0>;
70 };
71 };
72 };
73
Stephen Warren86815612015-08-13 22:34:22 -060074 sdhci@0,700b0000 {
75 status = "okay";
76 cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
77 power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
78 wp-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_LOW>;
79 bus-width = <4>;
80 };
81
82 sdhci@0,700b0600 {
83 status = "okay";
84 bus-width = <8>;
Tom Warren1c77f022016-09-13 10:45:42 -060085 non-removable;
Stephen Warren86815612015-08-13 22:34:22 -060086 };
87
88 i2c@0,7000d000 {
89 status = "okay";
90 clock-frequency = <400000>;
91 };
92
93 usb@0,7d000000 {
94 status = "okay";
95 dr_mode = "otg";
96 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
97 };
98
99 clocks {
100 compatible = "simple-bus";
101 #address-cells = <1>;
102 #size-cells = <0>;
103
104 clk32k_in: clock@0 {
105 compatible = "fixed-clock";
106 reg = <0>;
107 #clock-cells = <0>;
108 clock-frequency = <32768>;
109 };
110 };
111};