blob: 3482d2a07875049fb13a624031275aebaa01f973 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Patrice Chotardb8f96fc2017-02-21 13:37:06 +01002/*
Patrice Chotard9e216242017-10-23 09:53:57 +02003 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
Patrice Chotardb8f96fc2017-02-21 13:37:06 +01005 */
6
7#include <common.h>
8#include <dm.h>
9#include <regmap.h>
10#include <syscon.h>
11#include <sysreset.h>
12#include <asm/io.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060013#include <linux/bitops.h>
Patrice Chotardb8f96fc2017-02-21 13:37:06 +010014
15DECLARE_GLOBAL_DATA_PTR;
16
17struct sti_sysreset_priv {
18 phys_addr_t base;
19};
20
21static int sti_sysreset_request(struct udevice *dev, enum sysreset_t type)
22{
23 struct sti_sysreset_priv *priv = dev_get_priv(dev);
24
25 generic_clear_bit(0, (void __iomem *)priv->base);
26
27 return -EINPROGRESS;
28}
29
30static int sti_sysreset_probe(struct udevice *dev)
31{
32 struct sti_sysreset_priv *priv = dev_get_priv(dev);
33 struct udevice *syscon;
34 struct regmap *regmap;
35 struct fdtdec_phandle_args syscfg_phandle;
36 int ret;
37
38 /* get corresponding syscon phandle */
39 ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
40 "st,syscfg", NULL, 0, 0,
41 &syscfg_phandle);
42 if (ret < 0) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090043 pr_err("Can't get syscfg phandle: %d\n", ret);
Patrice Chotardb8f96fc2017-02-21 13:37:06 +010044 return ret;
45 }
46
47 ret = uclass_get_device_by_of_offset(UCLASS_SYSCON,
48 syscfg_phandle.node,
49 &syscon);
50 if (ret) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090051 pr_err("%s: uclass_get_device_by_of_offset failed: %d\n",
Patrice Chotardb8f96fc2017-02-21 13:37:06 +010052 __func__, ret);
53 return ret;
54 }
55
56 regmap = syscon_get_regmap(syscon);
57 if (!regmap) {
Masahiro Yamada81e10422017-09-16 14:10:41 +090058 pr_err("unable to get regmap for %s\n", syscon->name);
Patrice Chotardb8f96fc2017-02-21 13:37:06 +010059 return -ENODEV;
60 }
61
Masahiro Yamada54c5ecb2018-04-19 12:14:01 +090062 priv->base = regmap->ranges[0].start;
Patrice Chotardb8f96fc2017-02-21 13:37:06 +010063
64 return 0;
65}
66
67static struct sysreset_ops sti_sysreset = {
68 .request = sti_sysreset_request,
69};
70
71static const struct udevice_id sti_sysreset_ids[] = {
72 { .compatible = "st,stih407-restart" },
73 { }
74};
75
76U_BOOT_DRIVER(sysreset_sti) = {
77 .name = "sysreset_sti",
78 .id = UCLASS_SYSRESET,
79 .ops = &sti_sysreset,
80 .probe = sti_sysreset_probe,
81 .of_match = sti_sysreset_ids,
82 .priv_auto_alloc_size = sizeof(struct sti_sysreset_priv),
83};