blob: 18d139c34210d75dcdd888168821c2c3c5c89d17 [file] [log] [blame]
Marek Vasut408368f2014-10-24 23:39:07 +02001/*
2 * Copyright (C) 2014 Marek Vasut <marex@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 *
6 * Refer docs/README.imxmage for more details about how-to configure
7 * and create imximage boot image
8 *
9 * The syntax is taken as close as possible with the kwbimage
10 */
11
12/* image version */
13IMAGE_VERSION 2
14
15/* Boot Device : sd */
16BOOT_FROM sd
17
18#define __ASSEMBLY__
19#include <config.h>
20#include "asm/arch/iomux.h"
21#include "asm/arch/crm_regs.h"
22
23/* set the default clock gate to save power */
24DATA 4, CCM_CCGR0, 0x00C03F3F
25DATA 4, CCM_CCGR1, 0x0030FC03
26DATA 4, CCM_CCGR2, 0x0FFFC000
27DATA 4, CCM_CCGR3, 0x3FF00000
28DATA 4, CCM_CCGR4, 0xFFFFF300 /* enable NAND/GPMI/BCH clocks */
29DATA 4, CCM_CCGR5, 0x0F0000C3
30DATA 4, CCM_CCGR6, 0x000003FF
31
32/* enable AXI cache for VDOA/VPU/IPU */
33DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF
34/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
35DATA 4, MX6_IOMUXC_GPR6, 0x007F007F
36DATA 4, MX6_IOMUXC_GPR7, 0x007F007F
37
38/*
39 * Setup CCM_CCOSR register as follows:
40 *
41 * cko1_en = 1 --> CKO1 enabled
42 * cko1_div = 111 --> divide by 8
43 * cko1_sel = 1011 --> ahb_clk_root
44 *
45 * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
46 */
47DATA 4, CCM_CCOSR, 0x000000fb