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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vipin KUMAR7cb16352010-01-15 19:15:43 +05302/*
3 * (C) Copyright 2009
4 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
Vipin KUMAR7cb16352010-01-15 19:15:43 +05305 */
6
7#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -06008#include <init.h>
Simon Glass495a5dc2019-11-14 12:57:30 -07009#include <time.h>
Vipin KUMAR7cb16352010-01-15 19:15:43 +053010#include <asm/io.h>
11#include <asm/arch/hardware.h>
12#include <asm/arch/spr_gpt.h>
13#include <asm/arch/spr_misc.h>
Simon Glass6b9f0102020-05-10 11:40:06 -060014#include <asm/ptrace.h>
Simon Glassdbd79542020-05-10 11:40:11 -060015#include <linux/delay.h>
Vipin KUMAR7cb16352010-01-15 19:15:43 +053016
17#define GPT_RESOLUTION (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
18#define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
19
20static struct gpt_regs *const gpt_regs_p =
21 (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
22
23static struct misc_regs *const misc_regs_p =
24 (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
25
Heiko Schocher5504dab2011-01-20 22:56:39 +000026DECLARE_GLOBAL_DATA_PTR;
27
Patrick Delaunay9858a602018-10-05 11:33:52 +020028static ulong get_timer_masked(void);
29
Simon Glass2655ee12012-12-13 20:48:34 +000030#define timestamp gd->arch.tbl
Simon Glassa848da52012-12-13 20:48:35 +000031#define lastdec gd->arch.lastinc
Vipin KUMAR7cb16352010-01-15 19:15:43 +053032
33int timer_init(void)
34{
35 u32 synth;
36
37 /* Prescaler setting */
38#if defined(CONFIG_SPEAR3XX)
39 writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
40 synth = MISC_GPT4SYNTH;
41#elif defined(CONFIG_SPEAR600)
42 writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
43 synth = MISC_GPT3SYNTH;
44#else
Simon Glass167ad902016-09-12 23:18:30 -060045# error Incorrect config. Can only be SPEAR{600|300|310|320}
Vipin KUMAR7cb16352010-01-15 19:15:43 +053046#endif
47
48 writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
49 &misc_regs_p->periph_clk_cfg);
50
51 /* disable timers */
52 writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
53
54 /* load value for free running */
55 writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
56
57 /* auto reload, start timer */
58 writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
59
Graeme Russ944a7fe2011-07-15 02:21:14 +000060 /* Reset the timer */
61 lastdec = READ_TIMER();
62 timestamp = 0;
Vipin KUMAR7cb16352010-01-15 19:15:43 +053063
64 return 0;
65}
66
67/*
68 * timer without interrupts
69 */
Vipin KUMAR7cb16352010-01-15 19:15:43 +053070ulong get_timer(ulong base)
71{
72 return (get_timer_masked() / GPT_RESOLUTION) - base;
73}
74
Vipin KUMAR7cb16352010-01-15 19:15:43 +053075void __udelay(unsigned long usec)
76{
77 ulong tmo;
78 ulong start = get_timer_masked();
79 ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
80 ulong rndoff;
81
82 rndoff = (usec % 10) ? 1 : 0;
83
84 /* tenudelcnt timer tick gives 10 microsecconds delay */
85 tmo = ((usec / 10) + rndoff) * tenudelcnt;
86
87 while ((ulong) (get_timer_masked() - start) < tmo)
88 ;
89}
90
Patrick Delaunay9858a602018-10-05 11:33:52 +020091static ulong get_timer_masked(void)
Vipin KUMAR7cb16352010-01-15 19:15:43 +053092{
93 ulong now = READ_TIMER();
94
95 if (now >= lastdec) {
96 /* normal mode */
97 timestamp += now - lastdec;
98 } else {
99 /* we have an overflow ... */
100 timestamp += now + GPT_FREE_RUNNING - lastdec;
101 }
102 lastdec = now;
103
104 return timestamp;
105}
106
Vipin KUMAR7cb16352010-01-15 19:15:43 +0530107/*
108 * This function is derived from PowerPC code (read timebase as long long).
109 * On ARM it just returns the timer value.
110 */
111unsigned long long get_ticks(void)
112{
113 return get_timer(0);
114}
115
116/*
117 * This function is derived from PowerPC code (timebase clock frequency).
118 * On ARM it returns the number of timer ticks per second.
119 */
120ulong get_tbclk(void)
121{
122 return CONFIG_SPEAR_HZ;
123}