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Niklaus Giger62da8082007-07-27 11:27:15 +02001/*
Niklaus Gigerbb2da712008-02-25 18:37:01 +01002 *(C) Copyright 2005-2008 Netstal Maschinen AG
Niklaus Giger62da8082007-07-27 11:27:15 +02003 * Niklaus Giger (Niklaus.Giger@netstal.com)
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/************************************************************************
25 * hcu4.h - configuration for HCU4 board (similar to hcu5.h)
26 ***********************************************************************/
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*-----------------------------------------------------------------------
32 * High Level Configuration Options
33 *----------------------------------------------------------------------*/
34#define CONFIG_HCU4 1 /* Board is HCU4 */
35#define CONFIG_4xx 1 /* ... PPC4xx family */
Niklaus Giger62da8082007-07-27 11:27:15 +020036#define CONFIG_405GP 1
37#define CONFIG_4xx 1
Niklaus Gigerdebcb102008-10-01 14:46:13 +020038#define CONFIG_HOSTNAME hcu4
39
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020040#define CONFIG_SYS_TEXT_BASE 0xFFFB0000
41
Niklaus Gigerdebcb102008-10-01 14:46:13 +020042/*
43 * Include common defines/options for all boards produced by Netstal Maschinen
44 */
45#include "netstal-common.h"
Niklaus Giger62da8082007-07-27 11:27:15 +020046
47#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
48
49#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
50#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
51
52/*-----------------------------------------------------------------------
53 * Base addresses -- Note these are effective addresses where the
54 * actual resources get mapped (not physical addresses)
55*----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020056#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Monitor */
57#define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
Niklaus Giger62da8082007-07-27 11:27:15 +020058
59
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020060#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
61#define CONFIG_SYS_FLASH_BASE 0xfff80000 /* start of FLASH */
Wolfgang Denk0708bc62010-10-07 21:51:12 +020062#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Niklaus Giger62da8082007-07-27 11:27:15 +020063
64/* ... with on-chip memory here (4KBytes) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065#define CONFIG_SYS_OCM_DATA_ADDR 0xF4000000
66#define CONFIG_SYS_OCM_DATA_SIZE 0x00001000
Niklaus Giger62da8082007-07-27 11:27:15 +020067/* Do not set up locked dcache as init ram. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020068#undef CONFIG_SYS_INIT_DCACHE_CS
Niklaus Giger62da8082007-07-27 11:27:15 +020069
70/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020071#define CONFIG_SYS_TEMP_STACK_OCM 1
Niklaus Giger62da8082007-07-27 11:27:15 +020072
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020073#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* OCM */
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +020074#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_OCM_DATA_SIZE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020075#define CONFIG_SYS_GBL_DATA_SIZE 256 /* num bytes initial data */
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +020076#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
Michael Zaidmanf969a682010-09-20 08:51:53 +020077#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
Niklaus Giger62da8082007-07-27 11:27:15 +020078
79/*-----------------------------------------------------------------------
80 * Serial Port
81 *----------------------------------------------------------------------*/
82/*
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020083 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
84 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
85 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
Niklaus Giger62da8082007-07-27 11:27:15 +020086 * The Linux BASE_BAUD define should match this configuration.
87 * baseBaud = cpuClock/(uartDivisor*16)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020088 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
Niklaus Giger62da8082007-07-27 11:27:15 +020089 * set Linux BASE_BAUD to 403200.
90 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020091#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
92#define CONFIG_SYS_BASE_BAUD 691200
Niklaus Giger62da8082007-07-27 11:27:15 +020093
Niklaus Giger62da8082007-07-27 11:27:15 +020094/* Set console baudrate to 9600 */
95#define CONFIG_BAUDRATE 9600
96
Niklaus Giger62da8082007-07-27 11:27:15 +020097/*-----------------------------------------------------------------------
Niklaus Giger1767b382008-01-16 18:37:50 +010098 * Flash
99 *----------------------------------------------------------------------*/
100
Niklaus Gigerbb2da712008-02-25 18:37:01 +0100101/* Use common CFI driver */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200102#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200103#define CONFIG_FLASH_CFI_DRIVER
Niklaus Gigerbb2da712008-02-25 18:37:01 +0100104/* board provides its own flash_init code */
105#define CONFIG_FLASH_CFI_LEGACY 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200106#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
107#define CONFIG_SYS_FLASH_LEGACY_512Kx8 1
Niklaus Giger1767b382008-01-16 18:37:50 +0100108
Niklaus Gigerbb2da712008-02-25 18:37:01 +0100109/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200110#define CONFIG_SYS_FLASH_EMPTY_INFO
Niklaus Giger1767b382008-01-16 18:37:50 +0100111
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200112#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
113#define CONFIG_SYS_MAX_FLASH_SECT 8 /* max number of sectors on one chip */
Niklaus Giger1767b382008-01-16 18:37:50 +0100114
115/*-----------------------------------------------------------------------
Niklaus Giger62da8082007-07-27 11:27:15 +0200116 * Environment
117 *----------------------------------------------------------------------*/
118
Jean-Christophe PLAGNIOL-VILLARDfdb79c32008-09-10 22:47:59 +0200119#undef CONFIG_ENV_IS_IN_NVRAM
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200120#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200121#undef CONFIG_ENV_IS_NOWHERE
Niklaus Giger62da8082007-07-27 11:27:15 +0200122
Jean-Christophe PLAGNIOL-VILLARDe46af642008-09-05 09:19:30 +0200123#ifdef CONFIG_ENV_IS_IN_EEPROM
Niklaus Giger62da8082007-07-27 11:27:15 +0200124/* Put the environment after the SDRAM configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200125#define PROM_SIZE 2048
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200126#define CONFIG_ENV_OFFSET 512
127#define CONFIG_ENV_SIZE (PROM_SIZE-CONFIG_ENV_OFFSET)
Niklaus Giger62da8082007-07-27 11:27:15 +0200128#endif
129
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200130#ifdef CONFIG_ENV_IS_IN_FLASH
Niklaus Giger62da8082007-07-27 11:27:15 +0200131/* Put the environment in Flash */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200132#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200133#define CONFIG_ENV_ADDR ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200134#define CONFIG_ENV_SIZE 8*1024 /* 8 KB Environment Sector */
Niklaus Giger62da8082007-07-27 11:27:15 +0200135
136/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200137#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
138#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Niklaus Giger62da8082007-07-27 11:27:15 +0200139#endif
140
141/*-----------------------------------------------------------------------
142 * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
143 * the first internal I2C controller of the PPC440EPx
144 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200145#define CONFIG_SYS_SPD_BUS_NUM 0
Niklaus Giger62da8082007-07-27 11:27:15 +0200146
Niklaus Gigerdebcb102008-10-01 14:46:13 +0200147#define CONFIG_IPADDR 172.25.1.14
Niklaus Giger62da8082007-07-27 11:27:15 +0200148
Niklaus Gigerdebcb102008-10-01 14:46:13 +0200149#define CONFIG_EXTRA_ENV_SETTINGS \
150 CONFIG_NETSTAL_DEF_ENV \
151 CONFIG_NETSTAL_DEF_ENV_POWERPC \
Niklaus Giger62da8082007-07-27 11:27:15 +0200152 ""
Niklaus Giger62da8082007-07-27 11:27:15 +0200153
Stefan Roese75a3d5d2007-08-14 16:36:29 +0200154/*
155 * BOOTP options
156 */
157#define CONFIG_BOOTP_BOOTFILESIZE
158#define CONFIG_BOOTP_BOOTPATH
159#define CONFIG_BOOTP_GATEWAY
160#define CONFIG_BOOTP_HOSTNAME
161
162/*
163 * Command line configuration.
164 */
165#include <config_cmd_default.h>
166
167#define CONFIG_CMD_ASKENV
Stefan Roese75a3d5d2007-08-14 16:36:29 +0200168#define CONFIG_CMD_CACHE
169#define CONFIG_CMD_DHCP
170#define CONFIG_CMD_DIAG
171#define CONFIG_CMD_EEPROM
172#define CONFIG_CMD_ELF
173#define CONFIG_CMD_FLASH
174#define CONFIG_CMD_I2C
175#define CONFIG_CMD_IMMAP
176#define CONFIG_CMD_IRQ
177#define CONFIG_CMD_MII
178#define CONFIG_CMD_NET
179#define CONFIG_CMD_PING
180#define CONFIG_CMD_REGINFO
181#define CONFIG_CMD_SDRAM
Niklaus Giger62da8082007-07-27 11:27:15 +0200182
183/* SPD EEPROM (sdram speed config) disabled */
184#define CONFIG_SPD_EEPROM 1
185#define SPD_EEPROM_ADDRESS 0x50
186
Niklaus Giger1767b382008-01-16 18:37:50 +0100187/* POST support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200188#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
189 CONFIG_SYS_POST_CPU | \
190 CONFIG_SYS_POST_UART | \
191 CONFIG_SYS_POST_I2C | \
192 CONFIG_SYS_POST_CACHE | \
193 CONFIG_SYS_POST_ETHER | \
194 CONFIG_SYS_POST_SPR)
Niklaus Giger1767b382008-01-16 18:37:50 +0100195
Stefan Roesea0a14792010-09-29 16:58:38 +0200196#define CONFIG_SYS_POST_UART_TABLE { CONFIG_SYS_NS16550_COM1 }
Niklaus Giger1767b382008-01-16 18:37:50 +0100197#undef CONFIG_LOGBUFFER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200198#define CONFIG_SYS_POST_CACHE_ADDR 0x00800000 /* free virtual address */
199#define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
Niklaus Giger1767b382008-01-16 18:37:50 +0100200
Niklaus Giger62da8082007-07-27 11:27:15 +0200201/*-----------------------------------------------------------------------
202 * Miscellaneous configurable options
203 *----------------------------------------------------------------------*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204#define CONFIG_SYS_LONGHELP /* undef to save memory */
205#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Stefan Roese75a3d5d2007-08-14 16:36:29 +0200206#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200207 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Niklaus Giger62da8082007-07-27 11:27:15 +0200208#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200209 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Niklaus Giger62da8082007-07-27 11:27:15 +0200210#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200211#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
212#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
213#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Niklaus Giger62da8082007-07-27 11:27:15 +0200214
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200215#define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
216#define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
Niklaus Giger62da8082007-07-27 11:27:15 +0200217
218
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200219#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Niklaus Giger62da8082007-07-27 11:27:15 +0200220
221/*-----------------------------------------------------------------------
222 * External Bus Controller (EBC) Setup
223 */
224
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200225#define CONFIG_SYS_EBC_CFG 0x98400000
Niklaus Giger62da8082007-07-27 11:27:15 +0200226
Niklaus Giger1767b382008-01-16 18:37:50 +0100227/* Memory Bank 0 (Flash Bank 0) initialization */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200228#define CONFIG_SYS_EBC_PB0AP 0x02005400
229#define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
Niklaus Giger62da8082007-07-27 11:27:15 +0200230
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200231#define CONFIG_SYS_EBC_PB1AP 0x03041200
232#define CONFIG_SYS_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */
Niklaus Giger62da8082007-07-27 11:27:15 +0200233
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200234#define CONFIG_SYS_EBC_PB2AP 0x02054500
235#define CONFIG_SYS_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */
Niklaus Giger62da8082007-07-27 11:27:15 +0200236
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200237#define CONFIG_SYS_EBC_PB3AP 0x01840300
238#define CONFIG_SYS_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
Niklaus Giger62da8082007-07-27 11:27:15 +0200239
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200240#define CONFIG_SYS_EBC_PB4AP 0x01800300
241#define CONFIG_SYS_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
Niklaus Giger1767b382008-01-16 18:37:50 +0100242
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200243#define CONFIG_SYS_GPIO0_OR 0xF27FFFFF /* GPIO value */
244#define CONFIG_SYS_GPIO0_TCR 0x7FFE0000 /* GPIO value */
245#define CONFIG_SYS_GPIO0_ODR 0x00E897FC /* GPIO value */
Niklaus Giger62da8082007-07-27 11:27:15 +0200246
247/*
248 * For booting Linux, the board info and command line data
249 * have to be in the first 8 MB of memory, since this is
250 * the maximum mapped by the Linux kernel during initialization.
251 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200252#define CONFIG_SYS_BOOTMAPSZ (8 << 20)/* Initial Memory map for Linux */
Niklaus Giger62da8082007-07-27 11:27:15 +0200253
254/* Init Memory Controller:
255 *
256 * BR0/1 and OR0/1 (FLASH)
257 */
258
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200259#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
Niklaus Giger62da8082007-07-27 11:27:15 +0200260#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
261
262
263/* Configuration Port location */
264#define CONFIG_PORT_ADDR 0xF0000500
265
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200266#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
267#ifdef CONFIG_SYS_HUSH_PARSER
268#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Niklaus Giger62da8082007-07-27 11:27:15 +0200269#endif
270
Stefan Roese75a3d5d2007-08-14 16:36:29 +0200271#if defined(CONFIG_CMD_KGDB)
Niklaus Giger62da8082007-07-27 11:27:15 +0200272#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
273#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
274#endif
Niklaus Giger1767b382008-01-16 18:37:50 +0100275
Niklaus Giger62da8082007-07-27 11:27:15 +0200276#endif /* __CONFIG_H */