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Bartlomiej Sieka087415c2007-07-11 20:11:07 +02001/*
2 * (C) Copyright 2003-2007
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 */
30#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
31#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +020032#define CONFIG_CM5200 1 /* ... on CM5200 platform */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020033
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020034#define CONFIG_SYS_TEXT_BASE 0xfc000000
35
Becky Bruce03ea1be2008-05-08 19:02:12 -050036#define CONFIG_HIGH_BATS 1 /* High BATs supported */
37
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020038/*
39 * Supported commands
40 */
Wolfgang Denk56cbd022007-08-12 14:27:39 +020041#include <config_cmd_default.h>
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020042
Wolfgang Denk56cbd022007-08-12 14:27:39 +020043#define CONFIG_CMD_ASKENV
44#define CONFIG_CMD_BSP
45#define CONFIG_CMD_DATE
46#define CONFIG_CMD_DHCP
47#define CONFIG_CMD_DIAG
48#define CONFIG_CMD_FAT
49#define CONFIG_CMD_I2C
50#define CONFIG_CMD_JFFS2
51#define CONFIG_CMD_MII
52#define CONFIG_CMD_NFS
53#define CONFIG_CMD_PING
54#define CONFIG_CMD_REGINFO
55#define CONFIG_CMD_SNTP
56#define CONFIG_CMD_USB
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020057
58/*
59 * Serial console configuration
60 */
61#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
62#define CONFIG_BAUDRATE 57600 /* ... at 57600 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020063#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +020064#define CONFIG_SILENT_CONSOLE 1 /* needed to silence i2c_init() */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020065
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020066/*
67 * Ethernet configuration
68 */
69#define CONFIG_MPC5xxx_FEC 1
Ben Warrenbc1b9172009-02-05 23:58:25 -080070#define CONFIG_MPC5xxx_FEC_MII100
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020071#define CONFIG_PHY_ADDR 0x00
72#define CONFIG_ENV_OVERWRITE 1 /* allow overwriting of ethaddr */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020073/* use misc_init_r() to read ethaddr from I2C EEPROM (see CONFIG_SYS_I2C_EEPROM) */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020074#define CONFIG_MISC_INIT_R 1
75#define CONFIG_MAC_OFFSET 0x35 /* MAC address offset in I2C EEPROM */
76
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020077/*
78 * POST support
79 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020080#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU | CONFIG_SYS_POST_I2C)
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020081#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
82/* List of I2C addresses to be verified by POST */
Peter Tyser3f1d0db2010-10-22 00:20:30 -050083#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_SLAVE, \
84 CONFIG_SYS_I2C_IO, \
85 CONFIG_SYS_I2C_EEPROM}
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020086
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020087/* display image timestamps */
88#define CONFIG_TIMESTAMP 1
89
Bartlomiej Sieka087415c2007-07-11 20:11:07 +020090/*
91 * Autobooting
92 */
93#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
94#define CONFIG_PREBOOT "echo;" \
95 "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
96 "echo"
97#undef CONFIG_BOOTARGS
98
99/*
100 * Default environment settings
101 */
102#define CONFIG_EXTRA_ENV_SETTINGS \
103 "netdev=eth0\0" \
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200104 "netmask=255.255.0.0\0" \
105 "ipaddr=192.168.160.33\0" \
106 "serverip=192.168.1.1\0" \
107 "gatewayip=192.168.1.1\0" \
108 "console=ttyPSC0\0" \
109 "u-boot_addr=100000\0" \
110 "kernel_addr=200000\0" \
111 "kernel_addr_flash=fc0c0000\0" \
112 "fdt_addr=400000\0" \
113 "fdt_addr_flash=fc0a0000\0" \
114 "ramdisk_addr=500000\0" \
115 "rootpath=/opt/eldk-4.1/ppc_6xx\0" \
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +0200116 "u-boot=/tftpboot/cm5200/u-boot.bin\0" \
117 "bootfile_fdt=/tftpboot/cm5200/uImage\0" \
118 "fdt_file=/tftpboot/cm5200/cm5200.dtb\0" \
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200119 "load=tftp ${u-boot_addr} ${u-boot}\0" \
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +0200120 "update=prot off fc000000 +${filesize}; " \
121 "era fc000000 +${filesize}; " \
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200122 "cp.b ${u-boot_addr} fc000000 ${filesize}; " \
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +0200123 "prot on fc000000 +${filesize}\0" \
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200124 "nfsargs=setenv bootargs root=/dev/nfs rw " \
125 "nfsroot=${serverip}:${rootpath}\0" \
126 "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0" \
127 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
128 "addinit=setenv bootargs ${bootargs} init=/linuxrc\0" \
129 "addcons=setenv bootargs ${bootargs} " \
130 "console=${console},${baudrate}\0" \
131 "addip=setenv bootargs ${bootargs} " \
132 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
133 "${netmask}:${hostname}:${netdev}:off panic=1\0" \
134 "flash_flash=run flashargs addinit addip addcons;" \
135 "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0" \
136 "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; " \
137 "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip " \
138 "addcons; bootm ${kernel_addr} - ${fdt_addr}\0" \
139 ""
140#define CONFIG_BOOTCOMMAND "run flash_flash"
141
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200142/*
143 * Low level configuration
144 */
145
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200146/*
147 * Clock configuration
148 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200149#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* SYS_XTAL_IN = 33MHz */
150#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK 1 /* IPB = 133MHz */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200151
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200152/*
153 * Memory map
154 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200155#define CONFIG_SYS_MBAR 0xF0000000
156#define CONFIG_SYS_SDRAM_BASE 0x00000000
157#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200158
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200159#define CONFIG_SYS_LOWBOOT 1
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200160
161/* Use ON-Chip SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200162#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200163#ifdef CONFIG_POST
164/* preserve space for the post_word at end of on-chip SRAM */
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200165#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200166#else
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200167#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200168#endif
169
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200170#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes for initial data */
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200171#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE)
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +0200172#define CONFIG_BOARD_TYPES 1 /* we use board_type */
173
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200174#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200175
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200176#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200177#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
178#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */
179#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200180
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +0200181/*
182 * Flash configuration
183 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200184#define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200185#define CONFIG_FLASH_CFI_DRIVER 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200186#define CONFIG_SYS_FLASH_BASE 0xfc000000
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +0200187/* we need these despite using CFI */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200188#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
189#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sectors on one chip */
190#define CONFIG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +0200191
192
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200193#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
194#define CONFIG_SYS_RAMBOOT 1
195#undef CONFIG_SYS_LOWBOOT
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200196#endif
197
198
199/*
200 * Chip selects configuration
201 */
202/* Boot Chipselect */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200203#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
204#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
205#define CONFIG_SYS_BOOTCS_CFG 0x00087D31 /* for pci_clk = 33 MHz */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200206/* use board_early_init_r to enable flash write in CS_BOOT */
207#define CONFIG_BOARD_EARLY_INIT_R
208
209/* Flash memory addressing */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200210#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
211#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200212
213/* No burst, dead cycle = 1 for CS0 (Flash) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200214#define CONFIG_SYS_CS_BURST 0x00000000
215#define CONFIG_SYS_CS_DEADCYCLE 0x00000001
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200216
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200217/*
218 * SDRAM configuration
219 * settings for k4s561632E-xx75, assuming XLB = 132 MHz
220 */
221#define SDRAM_MODE 0x00CD0000 /* CASL 3, burst length 8 */
222#define SDRAM_CONTROL 0x514F0000
223#define SDRAM_CONFIG1 0xE2333900
224#define SDRAM_CONFIG2 0x8EE70000
225
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200226/*
227 * MTD configuration
228 */
Stefan Roeseb1423dd2009-03-19 13:30:36 +0100229#define CONFIG_CMD_MTDPARTS 1
Stefan Roese5dc958f2009-05-12 14:32:58 +0200230#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
231#define CONFIG_FLASH_CFI_MTD
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +0200232#define MTDIDS_DEFAULT "nor0=cm5200-0"
233#define MTDPARTS_DEFAULT "mtdparts=cm5200-0:" \
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200234 "384k(uboot),128k(env)," \
235 "128k(redund_env),128k(dtb)," \
236 "2m(kernel),27904k(rootfs)," \
237 "-(config)"
238
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200239/*
240 * I2C configuration
241 */
242#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200243#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 */
244#define CONFIG_SYS_I2C_SPEED 40000 /* 40 kHz */
245#define CONFIG_SYS_I2C_SLAVE 0x0
246#define CONFIG_SYS_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
247#define CONFIG_SYS_I2C_EEPROM 0x53 /* I2C EEPROM device address */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200248
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200249/*
250 * RTC configuration
251 */
252#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
253
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200254/*
255 * USB configuration
256 */
257#define CONFIG_USB_OHCI 1
258#define CONFIG_USB_STORAGE 1
259#define CONFIG_USB_CLOCK 0x0001BBBB
260#define CONFIG_USB_CONFIG 0x00001000
261/* Partitions (for USB) */
262#define CONFIG_MAC_PARTITION 1
263#define CONFIG_DOS_PARTITION 1
264#define CONFIG_ISO_PARTITION 1
265
266/*
267 * Invoke our last_stage_init function - needed by fwupdate
268 */
269#define CONFIG_LAST_STAGE_INIT 1
270
271/*
272 * Environment settings
273 */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200274#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200275#define CONFIG_ENV_SIZE 0x10000
276#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200277#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200278/* Configuration of redundant environment */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200279#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
280#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200281
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200282/*
283 * Pin multiplexing configuration
284 */
285
286/*
287 * CS1/GPIO_WKUP_6: GPIO (default)
288 * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
289 * IRDA/PSC6: UART
290 * Ether: Ethernet 100Mbit with MD
291 * PCI_DIS: PCI controller disabled
292 * USB: USB
293 * PSC3: SPI with UART3
294 * PSC2: UART
295 * PSC1: UART
296 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200297#define CONFIG_SYS_GPS_PORT_CONFIG 0x10559C44
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200298
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200299/*
300 * Miscellaneous configurable options
301 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200302#define CONFIG_SYS_LONGHELP 1 /* undef to save memory */
303#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
304#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
305#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
306#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
307#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200308
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200309#define CONFIG_SYS_ALT_MEMTEST 1
310#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
311#define CONFIG_SYS_MEMTEST_END 0x03f00000 /* 1 .. 63 MiB in SDRAM */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200312
313#define CONFIG_LOOPW 1
314
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200315#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
316#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200317
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200318/*
319 * Various low-level settings
320 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200321#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
322#define CONFIG_SYS_HID0_FINAL HID0_ICE
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200323
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200324#define CONFIG_SYS_XLB_PIPELINING 1 /* enable transaction pipeling */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200325
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200326/*
327 * Cache Configuration
328 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200329#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Wolfgang Denk56cbd022007-08-12 14:27:39 +0200330#ifdef CONFIG_CMD_KGDB
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200331#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200332#endif
333
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200334/*
335 * Flat Device Tree support
336 */
Bartlomiej Siekaa6533c82007-08-03 12:08:16 +0200337#define CONFIG_OF_LIBFDT 1
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200338#define CONFIG_OF_BOARD_SETUP 1
Bartlomiej Sieka087415c2007-07-11 20:11:07 +0200339#define OF_CPU "PowerPC,5200@0"
340#define OF_SOC "soc5200@f0000000"
341#define OF_TBCLK (bd->bi_busfreq / 4)
342#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
343
344#endif /* __CONFIG_H */