| Tom Rini | 0634fc0 | 2014-06-05 11:15:29 -0400 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2014 |
| 3 | * Texas Instruments, <www.ti.com> |
| 4 | * |
| 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 6 | */ |
| 7 | |
| 8 | #ifndef __POWER_TPS65218_H__ |
| 9 | #define __POWER_TPS65218_H__ |
| 10 | |
| 11 | /* I2C chip address */ |
| 12 | #define TPS65218_CHIP_PM 0x24 |
| 13 | |
| 14 | /* Registers */ |
| 15 | enum { |
| 16 | TPS65218_CHIPID = 0x00, |
| 17 | TPS65218_INT1, |
| 18 | TPS65218_INT2, |
| 19 | TPS65218_INT_MASK1, |
| 20 | TPS65218_INT_MASK2, |
| 21 | TPS65218_STATUS, |
| 22 | TPS65218_CONTROL, |
| 23 | TPS65218_FLAG, |
| 24 | TPS65218_PASSWORD = 0x10, |
| 25 | TPS65218_ENABLE1, |
| 26 | TPS65218_ENABLE2, |
| 27 | TPS65218_CONFIG1, |
| 28 | TPS65218_CONFIG2, |
| 29 | TPS65218_CONFIG3, |
| 30 | TPS65218_DCDC1, |
| 31 | TPS65218_DCDC2, |
| 32 | TPS65218_DCDC3, |
| 33 | TPS65218_DCDC4, |
| 34 | TPS65218_SLEW, |
| 35 | TPS65218_LDO1, |
| 36 | TPS65218_SEQ1 = 0x20, |
| 37 | TPS65218_SEQ2, |
| 38 | TPS65218_SEQ3, |
| 39 | TPS65218_SEQ4, |
| 40 | TPS65218_SEQ5, |
| 41 | TPS65218_SEQ6, |
| 42 | TPS65218_SEQ7, |
| 43 | TPS65218_PMIC_NUM_OF_REGS, |
| 44 | }; |
| 45 | |
| 46 | #define TPS65218_PROT_LEVEL_NONE 0x00 |
| 47 | #define TPS65218_PROT_LEVEL_1 0x01 |
| 48 | #define TPS65218_PROT_LEVEL_2 0x02 |
| 49 | |
| 50 | #define TPS65218_PASSWORD_LOCK_FOR_WRITE 0x00 |
| 51 | #define TPS65218_PASSWORD_UNLOCK 0x7D |
| 52 | |
| 53 | #define TPS65218_DCDC_GO 0x80 |
| 54 | |
| 55 | #define TPS65218_MASK_ALL_BITS 0xFF |
| 56 | |
| 57 | #define TPS65218_DCDC_VOLT_SEL_1100MV 0x19 |
| 58 | #define TPS65218_DCDC_VOLT_SEL_1330MV 0x30 |
| 59 | |
| 60 | int tps65218_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val, |
| 61 | uchar mask); |
| 62 | int tps65218_voltage_update(uchar dc_cntrl_reg, uchar volt_sel); |
| 63 | #endif /* __POWER_TPS65218_H__ */ |