| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ROCKCHIP=y |
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 4 | CONFIG_ROCKCHIP_RK3288=y |
| 5 | CONFIG_TARGET_CHROMEBOOK_JERRY=y |
| Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 6 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 7 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry" |
| 8 | CONFIG_SPL_STACK_R=y |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 9 | # CONFIG_CMD_IMLS is not set |
| 10 | # CONFIG_CMD_SETEXPR is not set |
| 11 | CONFIG_CMD_PMIC=y |
| 12 | CONFIG_CMD_REGULATOR=y |
| 13 | CONFIG_SPL_OF_CONTROL=y |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 14 | CONFIG_REGMAP=y |
| huang lin | dd8515e | 2015-11-17 14:20:13 +0800 | [diff] [blame] | 15 | CONFIG_SPL_REGMAP=y |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 16 | CONFIG_SYSCON=y |
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 17 | CONFIG_CLK=y |
| 18 | CONFIG_SPL_CLK=y |
| 19 | CONFIG_ROCKCHIP_GPIO=y |
| 20 | CONFIG_SYS_I2C_ROCKCHIP=y |
| huang lin | dd8515e | 2015-11-17 14:20:13 +0800 | [diff] [blame] | 21 | CONFIG_SPL_SYSCON=y |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 22 | CONFIG_LED=y |
| 23 | CONFIG_SPL_LED=y |
| 24 | CONFIG_LED_GPIO=y |
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 25 | CONFIG_RESET=y |
| 26 | CONFIG_DM_MMC=y |
| 27 | CONFIG_ROCKCHIP_DWMMC=y |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 28 | CONFIG_PINCTRL=y |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 29 | CONFIG_SPL_PINCTRL=y |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 30 | CONFIG_ROCKCHIP_PINCTRL=y |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 31 | CONFIG_DM_PMIC=y |
| 32 | CONFIG_PMIC_ACT8846=y |
| 33 | CONFIG_DM_REGULATOR=y |
| 34 | CONFIG_REGULATOR_ACT8846=y |
| 35 | CONFIG_RAM=y |
| 36 | CONFIG_SPL_RAM=y |
| Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 37 | CONFIG_DEBUG_UART=y |
| 38 | CONFIG_DEBUG_UART_BASE=0xff690000 |
| 39 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 40 | CONFIG_DEBUG_UART_SHIFT=2 |
| Thomas Chou | a6cec01 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 41 | CONFIG_SYS_NS16550=y |
| Simon Glass | 9d5d1cc | 2015-08-30 16:55:42 -0600 | [diff] [blame] | 42 | CONFIG_USE_PRIVATE_LIBGCC=y |
| 43 | CONFIG_CMD_DHRYSTONE=y |
| 44 | CONFIG_ERRNO_STR=y |