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Siva Durga Prasad Paladugu650fb402015-06-10 15:50:57 +05301if ARCH_ZYNQMP
2
Michal Simek04b7e622015-01-15 10:01:51 +01003config SYS_BOARD
Liam Beguindda9e212021-10-20 11:25:18 -04004 string "Board name"
Michal Simek04b7e622015-01-15 10:01:51 +01005 default "zynqmp"
6
7config SYS_VENDOR
Mike Looijmans61d245c2017-01-03 09:47:52 +01008 string "Vendor name"
Michal Simek04b7e622015-01-15 10:01:51 +01009 default "xilinx"
10
11config SYS_SOC
12 default "zynqmp"
13
14config SYS_CONFIG_NAME
Michal Simek7b5413e2016-03-18 18:21:36 +010015 string "Board configuration name"
16 default "xilinx_zynqmp"
17 help
18 This option contains information about board configuration name.
19 Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
20 will be used for board configuration.
Michal Simek04b7e622015-01-15 10:01:51 +010021
Siva Durga Prasad Paladugu4628c502017-07-13 19:01:11 +053022config SYS_MEM_RSVD_FOR_MMU
23 bool "Reserve memory for MMU Table"
24 help
25 If defined this option is used to setup different space for
26 MMU table than the one which will be allocated during
27 relocation.
28
Mike Looijmans96e706f2016-09-20 11:37:24 +020029config BOOT_INIT_FILE
30 string "boot.bin init register filename"
Michal Simek5d359092016-12-16 13:00:26 +010031 depends on SPL
Mike Looijmans96e706f2016-09-20 11:37:24 +020032 default ""
33 help
34 Add register writes to boot.bin format (max 256 pairs).
35 Expect a table of register-value pairs, e.g. "0x12345678 0x4321"
36
Michal Simekdde5a882016-10-21 12:58:17 +020037config PMUFW_INIT_FILE
38 string "PMU firmware"
39 depends on SPL
40 default ""
41 help
42 Include external PMUFW (Platform Management Unit FirmWare) to
43 a Xilinx bootable image (boot.bin).
44
Luca Ceresoli23e65002019-05-21 18:06:43 +020045config ZYNQMP_SPL_PM_CFG_OBJ_FILE
46 string "PMU firmware configuration object to load at runtime by SPL"
47 depends on SPL
48 help
49 Path to a binary PMU firmware configuration object to be linked
50 into U-Boot SPL and loaded at runtime into the PMU firmware.
51
52 The ZynqMP Power Management Unit (PMU) needs a configuration
53 object for most SoC peripherals to work. To have it loaded by
54 U-Boot SPL set here the file name (absolute path or relative to
55 the top source tree) of your configuration, which must be a
56 binary blob. It will be linked in the SPL binary and loaded
57 into the PMU firmware by U-Boot SPL during board
58 initialization.
59
60 Leave this option empty if your PMU firmware has a hard-coded
61 configuration object or you are loading it by any other means.
62
Siva Durga Prasad Paladugucafb6312018-01-12 15:35:46 +053063config ZYNQMP_NO_DDR
64 bool "Disable DDR MMU mapping"
65 help
66 This option configures MMU with no DDR to avoid speculative
67 access to DDR memory where DDR is not present.
68
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +020069config SPL_ZYNQMP_DRAM_ECC_INIT
70 bool "Initialize DRAM ECC"
71 depends on SPL
72 help
73 This option initializes all memory to 0xdeadbeef. Must be set if your
74 memory is of ECC type.
75
76config SPL_ZYNQMP_DRAM_BANK1_BASE
77 depends on SPL_ZYNQMP_DRAM_ECC_INIT
78 hex "DRAM Bank1 address"
Michal Simek70597f82023-10-26 08:34:31 +020079 default 0x00000000
80 help
81 Start address of DRAM ECC bank1
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +020082
83config SPL_ZYNQMP_DRAM_BANK1_LEN
84 depends on SPL_ZYNQMP_DRAM_ECC_INIT
85 hex "DRAM Bank1 size"
Michal Simek70597f82023-10-26 08:34:31 +020086 default 0x80000000
87 help
88 Size in bytes of the DRAM ECC bank1
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +020089
90config SPL_ZYNQMP_DRAM_BANK2_BASE
91 depends on SPL_ZYNQMP_DRAM_ECC_INIT
92 hex "DRAM Bank2 address"
Michal Simek70597f82023-10-26 08:34:31 +020093 default 0x800000000
94 help
95 Start address of DRAM ECC bank2
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +020096
97config SPL_ZYNQMP_DRAM_BANK2_LEN
98 depends on SPL_ZYNQMP_DRAM_ECC_INIT
99 hex "DRAM Bank2 size"
Michal Simek70597f82023-10-26 08:34:31 +0200100 default 0x0
101 help
102 Size in bytes of the DRAM ECC bank2. A null size takes no action.
Jorge Ramirez-Ortiz35456962021-06-13 20:55:53 +0200103
Simon Glasscb3e4892016-07-05 17:10:13 -0600104config SYS_MALLOC_F_LEN
105 default 0x600
106
Siva Durga Prasad Paladugu9ed4e812017-07-13 19:01:10 +0530107config DEFINE_TCM_OCM_MMAP
108 bool "Define TCM and OCM memory in MMU Table"
Siva Durga Prasad Paladuguc3dfac92017-08-01 16:24:50 +0530109 default y if MP
Siva Durga Prasad Paladugu9ed4e812017-07-13 19:01:10 +0530110 help
111 This option if enabled defines the TCM and OCM memory and its
112 memory attributes in MMU table entry.
113
Michal Simekd8218792017-07-12 13:21:27 +0200114config ZYNQMP_PSU_INIT_ENABLED
115 bool "Include psu_init"
Michal Simekba6fb832022-02-17 14:28:40 +0100116 select BOARD_EARLY_INIT_F
Michal Simekd8218792017-07-12 13:21:27 +0200117 help
Michal Simek461b9312022-12-02 09:18:06 +0100118 Include psu_init to full u-boot.
119
120config SPL_ZYNQMP_PSU_INIT_ENABLED
121 bool "Include psu_init in SPL"
Michal Simek1bae5ec2024-03-12 16:51:21 +0100122 depends on SPL
123 default y
Michal Simek461b9312022-12-02 09:18:06 +0100124 select BOARD_EARLY_INIT_F
125 help
126 Include psu_init by default in SPL.
Michal Simekd8218792017-07-12 13:21:27 +0200127
Michal Simek94ddcaa2016-08-30 16:17:27 +0200128config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
129 bool "Overwrite SPL bootmode"
130 depends on SPL
131 help
132 Overwrite bootmode selected via boot mode pins to tell SPL what should
133 be the next boot device.
134
Jorge Ramirez-Ortiz34deca52021-10-13 15:48:00 +0200135config SPL_ZYNQMP_RESTORE_JTAG
136 bool "Restore JTAG"
137 depends on SPL
138 help
139 Booting SPL in secure mode causes the CSU to disable the JTAG interface
140 even if no eFuses were burnt. This option restores the interface if
141 possible.
142
Vipul Kumar62548002018-02-28 15:53:28 +0530143config ZYNQ_SDHCI_MAX_FREQ
144 default 200000000
145
Michal Simek94ddcaa2016-08-30 16:17:27 +0200146config SPL_ZYNQMP_ALT_BOOTMODE
147 hex
148 default 0x0 if JTAG_MODE
149 default 0x1 if QSPI_MODE_24BIT
150 default 0x2 if QSPI_MODE_32BIT
151 default 0x3 if SD_MODE
152 default 0x4 if NAND_MODE
153 default 0x5 if SD_MODE1
154 default 0x6 if EMMC_MODE
155 default 0x7 if USB_MODE
Michal Simek2740d372016-10-26 09:24:32 +0200156 default 0xa if SW_USBHOST_MODE
157 default 0xb if SW_SATA_MODE
Michal Simeke1c4d392017-02-15 09:41:53 +0100158 default 0xe if SD1_LSHFT_MODE
Michal Simek94ddcaa2016-08-30 16:17:27 +0200159
160choice
161 prompt "Boot mode"
Michal Simek8ffddc32016-08-30 16:17:27 +0200162 depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Ulf Magnusson3e3b16a2018-01-30 14:02:01 +0100163 default JTAG_MODE
Michal Simek94ddcaa2016-08-30 16:17:27 +0200164
165config JTAG_MODE
166 bool "JTAG_MODE"
167
168config QSPI_MODE_24BIT
169 bool "QSPI_MODE_24BIT"
170
171config QSPI_MODE_32BIT
172 bool "QSPI_MODE_32BIT"
173
174config SD_MODE
175 bool "SD_MODE"
176
177config SD_MODE1
178 bool "SD_MODE1"
179
180config NAND_MODE
181 bool "NAND_MODE"
182
183config EMMC_MODE
184 bool "EMMC_MODE"
185
186config USB_MODE
187 bool "USB"
188
Michal Simek2740d372016-10-26 09:24:32 +0200189config SW_USBHOST_MODE
190 bool "SW USBHOST_MODE"
191
192config SW_SATA_MODE
193 bool "SW SATA_MODE"
194
Michal Simeke1c4d392017-02-15 09:41:53 +0100195config SD1_LSHFT_MODE
196 bool "SD1_LSHFT_MODE"
197
Michal Simek94ddcaa2016-08-30 16:17:27 +0200198endchoice
Simon Glasscb3e4892016-07-05 17:10:13 -0600199
Michal Simek5f884852020-08-27 15:34:11 +0200200source "board/xilinx/Kconfig"
201source "board/xilinx/zynqmp/Kconfig"
202
Michal Simek04b7e622015-01-15 10:01:51 +0100203endif