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Wolfgang Denk994ad962006-10-24 14:42:37 +02001/*
2 * Copyright (C) 2005-2006 Atmel Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22#include <common.h>
23
24#include <asm/io.h>
25#include <asm/sdram.h>
Haavard Skinnemoend5d6ca62008-01-23 17:20:14 +010026#include <asm/arch/clk.h>
Haavard Skinnemoen0a2743f2006-11-19 18:06:53 +010027#include <asm/arch/gpio.h>
28#include <asm/arch/hmatrix2.h>
Wolfgang Denk994ad962006-10-24 14:42:37 +020029
30DECLARE_GLOBAL_DATA_PTR;
31
Haavard Skinnemoen1ba3b742007-11-22 12:14:11 +010032#ifdef CONFIG_ATSTK1006
33/* Dual MT48LC16M16A2-7E on daughterboard */
Wolfgang Denk994ad962006-10-24 14:42:37 +020034static const struct sdram_info sdram = {
35 .phys_addr = CFG_SDRAM_BASE,
Haavard Skinnemoen1ba3b742007-11-22 12:14:11 +010036 .row_bits = 13,
37 .col_bits = 9,
38 .bank_bits = 2,
39 .cas = 2,
40 .twr = 2,
41 .trc = 7,
42 .trp = 2,
43 .trcd = 2,
44 .tras = 4,
45 .txsr = 7,
46 /* 7.81 us */
47 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
48};
49#else
50/* MT48LC2M32B2-5 on motherboard */
51static const struct sdram_info sdram = {
52 .phys_addr = CFG_SDRAM_BASE,
Wolfgang Denk994ad962006-10-24 14:42:37 +020053 .row_bits = 11,
54 .col_bits = 8,
55 .bank_bits = 2,
56 .cas = 3,
57 .twr = 2,
58 .trc = 7,
59 .trp = 2,
60 .trcd = 2,
61 .tras = 5,
62 .txsr = 5,
Haavard Skinnemoend5d6ca62008-01-23 17:20:14 +010063 /* 15.6 us */
64 .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000,
Wolfgang Denk994ad962006-10-24 14:42:37 +020065};
Haavard Skinnemoen1ba3b742007-11-22 12:14:11 +010066#endif
Wolfgang Denk994ad962006-10-24 14:42:37 +020067
Haavard Skinnemoen0a2743f2006-11-19 18:06:53 +010068int board_early_init_f(void)
69{
70 /* Set the SDRAM_ENABLE bit in the HEBI SFR */
71 hmatrix2_writel(SFR4, 1 << 1);
72
73 gpio_enable_ebi();
74 gpio_enable_usart1();
Haavard Skinnemoen58f4c262006-12-17 17:14:30 +010075#if defined(CONFIG_MACB)
76 gpio_enable_macb0();
77 gpio_enable_macb1();
78#endif
Haavard Skinnemoene034f522006-12-17 18:56:46 +010079#if defined(CONFIG_MMC)
80 gpio_enable_mmci();
81#endif
Haavard Skinnemoen0a2743f2006-11-19 18:06:53 +010082
83 return 0;
84}
85
Haavard Skinnemoen1def43a2006-12-17 14:46:06 +010086long int initdram(int board_type)
Wolfgang Denk994ad962006-10-24 14:42:37 +020087{
Haavard Skinnemoen1def43a2006-12-17 14:46:06 +010088 return sdram_init(&sdram);
Wolfgang Denk994ad962006-10-24 14:42:37 +020089}
90
91void board_init_info(void)
92{
93 gd->bd->bi_phy_id[0] = 0x10;
94 gd->bd->bi_phy_id[1] = 0x11;
95}