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Rajeshwari Shindea2174522012-10-25 19:49:25 +00001/*
2 * Copyright (C) 2012 Samsung Electronics
3 * R. Chandrasekar <rcsekar@samsung.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Rajeshwari Shindea2174522012-10-25 19:49:25 +00006 */
7
8#ifndef __I2S_REGS_H__
9#define __I2S_REGS_H__
10
11#define CON_TXFIFO_FULL (1 << 8)
12#define CON_TXCH_PAUSE (1 << 4)
13#define CON_ACTIVE (1 << 0)
14
15#define MOD_BLCP_SHIFT 24
16#define MOD_BLCP_16BIT (0 << MOD_BLCP_SHIFT)
17#define MOD_BLCP_8BIT (1 << MOD_BLCP_SHIFT)
18#define MOD_BLCP_24BIT (2 << MOD_BLCP_SHIFT)
19#define MOD_BLCP_MASK (3 << MOD_BLCP_SHIFT)
20
21#define MOD_BLC_16BIT (0 << 13)
22#define MOD_BLC_8BIT (1 << 13)
23#define MOD_BLC_24BIT (2 << 13)
24#define MOD_BLC_MASK (3 << 13)
25
26#define MOD_SLAVE (1 << 11)
27#define MOD_MASK (3 << 8)
28#define MOD_LR_LLOW (0 << 7)
29#define MOD_LR_RLOW (1 << 7)
30#define MOD_SDF_IIS (0 << 5)
31#define MOD_SDF_MSB (1 << 5)
32#define MOD_SDF_LSB (2 << 5)
33#define MOD_SDF_MASK (3 << 5)
34#define MOD_RCLK_256FS (0 << 3)
35#define MOD_RCLK_512FS (1 << 3)
36#define MOD_RCLK_384FS (2 << 3)
37#define MOD_RCLK_768FS (3 << 3)
38#define MOD_RCLK_MASK (3 << 3)
39#define MOD_BCLK_32FS (0 << 1)
40#define MOD_BCLK_48FS (1 << 1)
41#define MOD_BCLK_16FS (2 << 1)
42#define MOD_BCLK_24FS (3 << 1)
43#define MOD_BCLK_MASK (3 << 1)
44
45#define MOD_CDCLKCON (1 << 12)
46
47#define FIC_TXFLUSH (1 << 15)
48#define FIC_RXFLUSH (1 << 7)
49
50#endif /* __I2S_REGS_H__ */