| Simon Glass | 8c50102 | 2019-12-06 21:41:54 -0700 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Sandbox PMC for testing |
| 4 | * |
| 5 | * Copyright 2019 Google LLC |
| 6 | */ |
| 7 | |
| 8 | #define LOG_CATEGORY UCLASS_ACPI_PMC |
| 9 | |
| 10 | #include <common.h> |
| 11 | #include <dm.h> |
| 12 | #include <asm/io.h> |
| 13 | #include <power/acpi_pmc.h> |
| 14 | |
| 15 | #define GPIO_GPE_CFG 0x1050 |
| 16 | |
| 17 | /* Memory mapped IO registers behind PMC_BASE_ADDRESS */ |
| 18 | #define PRSTS 0x1000 |
| 19 | #define GEN_PMCON1 0x1020 |
| 20 | #define GEN_PMCON2 0x1024 |
| 21 | #define GEN_PMCON3 0x1028 |
| 22 | |
| 23 | /* Offset of TCO registers from ACPI base I/O address */ |
| 24 | #define TCO_REG_OFFSET 0x60 |
| 25 | #define TCO1_STS 0x64 |
| 26 | #define TCO2_STS 0x66 |
| 27 | #define TCO1_CNT 0x68 |
| 28 | #define TCO2_CNT 0x6a |
| 29 | |
| 30 | struct sandbox_pmc_priv { |
| 31 | ulong base; |
| 32 | }; |
| 33 | |
| 34 | static int sandbox_pmc_fill_power_state(struct udevice *dev) |
| 35 | { |
| 36 | struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); |
| 37 | |
| 38 | upriv->tco1_sts = inw(upriv->acpi_base + TCO1_STS); |
| 39 | upriv->tco2_sts = inw(upriv->acpi_base + TCO2_STS); |
| 40 | |
| 41 | upriv->prsts = readl(upriv->pmc_bar0 + PRSTS); |
| 42 | upriv->gen_pmcon1 = readl(upriv->pmc_bar0 + GEN_PMCON1); |
| 43 | upriv->gen_pmcon2 = readl(upriv->pmc_bar0 + GEN_PMCON2); |
| 44 | upriv->gen_pmcon3 = readl(upriv->pmc_bar0 + GEN_PMCON3); |
| 45 | |
| 46 | return 0; |
| 47 | } |
| 48 | |
| 49 | static int sandbox_prev_sleep_state(struct udevice *dev, int prev_sleep_state) |
| 50 | { |
| 51 | return prev_sleep_state; |
| 52 | } |
| 53 | |
| 54 | static int sandbox_disable_tco(struct udevice *dev) |
| 55 | { |
| 56 | struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); |
| 57 | |
| 58 | pmc_disable_tco_base(upriv->acpi_base + TCO_REG_OFFSET); |
| 59 | |
| 60 | return 0; |
| 61 | } |
| 62 | |
| 63 | static int sandbox_pmc_probe(struct udevice *dev) |
| 64 | { |
| 65 | struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); |
| 66 | struct udevice *bus; |
| 67 | ulong base; |
| 68 | |
| 69 | uclass_first_device(UCLASS_PCI, &bus); |
| 70 | base = dm_pci_read_bar32(dev, 0); |
| 71 | if (base == FDT_ADDR_T_NONE) |
| 72 | return log_msg_ret("No base address", -EINVAL); |
| 73 | upriv->pmc_bar0 = map_sysmem(base, 0x2000); |
| 74 | upriv->gpe_cfg = (u32 *)(upriv->pmc_bar0 + GPIO_GPE_CFG); |
| 75 | |
| 76 | return pmc_ofdata_to_uc_platdata(dev); |
| 77 | } |
| 78 | |
| 79 | static struct acpi_pmc_ops sandbox_pmc_ops = { |
| 80 | .init = sandbox_pmc_fill_power_state, |
| 81 | .prev_sleep_state = sandbox_prev_sleep_state, |
| 82 | .disable_tco = sandbox_disable_tco, |
| 83 | }; |
| 84 | |
| 85 | static const struct udevice_id sandbox_pmc_ids[] = { |
| 86 | { .compatible = "sandbox,pmc" }, |
| 87 | { } |
| 88 | }; |
| 89 | |
| 90 | U_BOOT_DRIVER(pmc_sandbox) = { |
| 91 | .name = "pmc_sandbox", |
| 92 | .id = UCLASS_ACPI_PMC, |
| 93 | .of_match = sandbox_pmc_ids, |
| 94 | .probe = sandbox_pmc_probe, |
| 95 | .ops = &sandbox_pmc_ops, |
| 96 | .priv_auto_alloc_size = sizeof(struct sandbox_pmc_priv), |
| 97 | }; |