blob: 41336b4075fdaf1156087a799ece3a9f1f17019d [file] [log] [blame]
Peng Fane7080f82016-10-11 14:29:11 +08001/*
2 * Copyright (C) 2016 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <config.h>
8
9#define ROM_API_TABLE_BASE_ADDR_LEGACY 0x180
10#define ROM_VERSION_OFFSET 0x80
11#define ROM_API_HWCNFG_SETUP_OFFSET 0x08
12
13plugin_start:
14
15 push {r0-r4, lr}
16
17 imx7_ddr_setting
18 imx7_clock_gating
19 imx7_qos_setting
20
21/*
22 * Check if we are in USB serial download mode and immediately return to ROM
23 * Need to check USB CTRL clock firstly, then check the USBx_nASYNCLISTADDR
24 */
25 ldr r0, =0x30384680
26 ldr r1, [r0]
27 cmp r1, #0
28 beq normal_boot
29
30 ldr r0, =0x30B10158
31 ldr r1, [r0]
32 cmp r1, #0
33 beq normal_boot
34
35 pop {r0-r4, lr}
36 bx lr
37
38normal_boot:
39
40/*
41 * The following is to fill in those arguments for this ROM function
42 * pu_irom_hwcnfg_setup(void **start, size_t *bytes, const void *boot_data)
43 * This function is used to copy data from the storage media into DDR.
44 * start - Initial (possibly partial) image load address on entry.
45 * Final image load address on exit.
46 * bytes - Initial (possibly partial) image size on entry.
47 * Final image size on exit.
48 * boot_data - Initial @ref ivt Boot Data load address.
49 */
50 adr r0, boot_data2
51 adr r1, image_len2
52 adr r2, boot_data2
53
54/*
55 * check the _pu_irom_api_table for the address
56 */
57before_calling_rom___pu_irom_hwcnfg_setup:
58 ldr r3, =ROM_VERSION_OFFSET
59 ldr r4, [r3]
60 ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY
61 ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET]
62 blx r4
63after_calling_rom___pu_irom_hwcnfg_setup:
64
65
66/* To return to ROM from plugin, we need to fill in these argument.
67 * Here is what need to do:
68 * Need to construct the paramters for this function before return to ROM:
69 * plugin_download(void **start, size_t *bytes, UINT32 *ivt_offset)
70 */
71 pop {r0-r4, lr}
72 push {r5}
73 ldr r5, boot_data2
74 str r5, [r0]
75 ldr r5, image_len2
76 str r5, [r1]
77 ldr r5, second_ivt_offset
78 str r5, [r2]
79 mov r0, #1
80 pop {r5}
81
82 /* return back to ROM code */
83 bx lr
84
85/* make the following data right in the end of the output*/
86.ltorg
87
88#define FLASH_OFFSET 0x400
89
90/*
91 * second_ivt_offset is the offset from the "second_ivt_header" to
92 * "image_copy_start", which involves FLASH_OFFSET, plus the first
93 * ivt_header, the plugin code size itself recorded by "ivt2_header"
94 */
95
96second_ivt_offset: .long (ivt2_header + 0x2C + FLASH_OFFSET)
97
98/*
99 * The following is the second IVT header plus the second boot data
100 */
101ivt2_header: .long 0x0
102app2_code_jump_v: .long 0x0
103reserv3: .long 0x0
104dcd2_ptr: .long 0x0
105boot_data2_ptr: .long 0x0
106self_ptr2: .long 0x0
107app_code_csf2: .long 0x0
108reserv4: .long 0x0
109boot_data2: .long 0x0
110image_len2: .long 0x0
111plugin2: .long 0x0