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Linus Walleij717b0a82012-08-04 05:21:28 +00001/*
2 * (C) Copyright 2012
3 * Linaro
4 * Linus Walleij <linus.walleij@linaro.org>
5 * Common ARM Integrator configuration settings
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#define CONFIG_INTEGRATOR
27
28#define CONFIG_SYS_TEXT_BASE 0x01000000
29#define CONFIG_SYS_MEMTEST_START 0x100000
30#define CONFIG_SYS_MEMTEST_END 0x10000000
31#define CONFIG_SYS_HZ 1000
32#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
33#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
34#define CONFIG_SYS_LONGHELP
35#define CONFIG_SYS_HUSH_PARSER
36#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
37#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
38#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
39#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
40#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
41
42#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
43#define CONFIG_SETUP_MEMORY_TAGS
Linus Walleij44796de2013-04-03 19:19:20 +000044#define CONFIG_OF_LIBFDT /* enable passing a Device Tree */
Linus Walleij717b0a82012-08-04 05:21:28 +000045#define CONFIG_MISC_INIT_R /* call misc_init_r during start up */
46
47/*
48 * There are various dependencies on the core module (CM) fitted
49 * Users should refer to their CM user guide
50 */
51#include "armcoremodule.h"
52
53/*
54 * Initialize and remap the core module, use SPD to detect memory size
55 * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
56 * the core module has a CM_INIT register
57 * then the U-Boot initialisation code will
58 * e.g. ARM Boot Monitor or pre-loader is repeated once
59 * (to re-initialise any existing CM_INIT settings to safe values).
60 *
61 * This is usually not the desired behaviour since the platform
62 * will either reboot into the ARM monitor (or pre-loader)
63 * or continuously cycle thru it without U-Boot running,
64 * depending upon the setting of Integrator/CP switch S2-4.
65 *
66 * However it may be needed if Integrator/CP switch S2-1
67 * is set OFF to boot direct into U-Boot.
68 * In that case comment out the line below.
69 */
70#define CONFIG_CM_INIT
71#define CONFIG_CM_REMAP
72#define CONFIG_CM_SPD_DETECT
73
74/*
75 * The ARM boot monitor initializes the board.
76 * However, the default U-Boot code also performs the initialization.
77 * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
78 * - see documentation supplied with board for details of how to choose the
79 * image to run at reset/power up
80 * e.g. whether the ARM Boot Monitor runs before U-Boot
81 */
82/* #define CONFIG_SKIP_LOWLEVEL_INIT */
83
84/*
85 * The ARM boot monitor does not relocate U-Boot.
86 * However, the default U-Boot code performs the relocation check,
87 * and may relocate the code if the memory map is changed.
88 * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
89 */
90/* #define SKIP_CONFIG_RELOCATE_UBOOT */
91
92
93/*
94 * Physical Memory Map
95 */
96#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
97#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
98#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
99#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
100#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
101#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
102 CONFIG_SYS_INIT_RAM_SIZE - \
103 GENERATED_GBL_DATA_SIZE)
104#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET