Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Michal Simek | 60f0783 | 2018-03-28 14:49:43 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (c) Copyright 2015 Xilinx, Inc. All rights reserved. |
Michal Simek | 60f0783 | 2018-03-28 14:49:43 +0200 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <asm/arch/psu_init_gpl.h> |
| 7 | #include <xil_io.h> |
| 8 | |
| 9 | static unsigned long psu_pll_init_data(void) |
| 10 | { |
| 11 | psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4B0C62U); |
| 12 | psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U); |
| 13 | psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); |
| 14 | psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); |
| 15 | psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); |
| 16 | mask_poll(0xFF5E0040, 0x00000002U); |
| 17 | psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); |
| 18 | psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000300U); |
| 19 | psu_mask_write(0xFF5E0038, 0x8000FFFFU, 0x8000C76CU); |
| 20 | psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E672C6CU); |
| 21 | psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00002D00U); |
| 22 | psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); |
| 23 | psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); |
| 24 | psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); |
| 25 | mask_poll(0xFF5E0040, 0x00000001U); |
| 26 | psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); |
| 27 | psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); |
| 28 | psu_mask_write(0xFF5E0028, 0x8000FFFFU, 0x00000000U); |
| 29 | psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); |
| 30 | psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); |
| 31 | psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); |
| 32 | psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); |
| 33 | psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); |
| 34 | mask_poll(0xFD1A0044, 0x00000001U); |
| 35 | psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); |
| 36 | psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); |
| 37 | psu_mask_write(0xFD1A0028, 0x8000FFFFU, 0x00000000U); |
| 38 | psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); |
| 39 | psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U); |
| 40 | psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); |
| 41 | psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); |
| 42 | psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); |
| 43 | mask_poll(0xFD1A0044, 0x00000002U); |
| 44 | psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); |
| 45 | psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000300U); |
| 46 | psu_mask_write(0xFD1A0034, 0x8000FFFFU, 0x00000000U); |
| 47 | psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C62U); |
| 48 | psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00014700U); |
| 49 | psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); |
| 50 | psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); |
| 51 | psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); |
| 52 | mask_poll(0xFD1A0044, 0x00000004U); |
| 53 | psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); |
| 54 | psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); |
| 55 | psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x8000497FU); |
| 56 | |
| 57 | return 1; |
| 58 | } |
| 59 | |
| 60 | static unsigned long psu_clock_init_data(void) |
| 61 | { |
| 62 | psu_mask_write(0xFF5E0058, 0x063F3F07U, 0x06010C00U); |
| 63 | psu_mask_write(0xFF5E0100, 0x013F3F07U, 0x01010600U); |
| 64 | psu_mask_write(0xFF5E0064, 0x023F3F07U, 0x02010600U); |
| 65 | psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); |
| 66 | psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U); |
| 67 | psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); |
| 68 | psu_mask_write(0xFF5E007C, 0x013F3F07U, 0x01010800U); |
| 69 | psu_mask_write(0xFF5E0080, 0x013F3F07U, 0x01010800U); |
| 70 | psu_mask_write(0xFF5E0084, 0x013F3F07U, 0x01010F00U); |
| 71 | psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U); |
| 72 | psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); |
| 73 | psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); |
| 74 | psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000800U); |
| 75 | psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); |
| 76 | psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); |
| 77 | psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); |
| 78 | psu_mask_write(0xFF5E00B4, 0x013F3F07U, 0x01010F00U); |
| 79 | psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); |
| 80 | psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010F00U); |
| 81 | psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01040F00U); |
| 82 | psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010500U); |
| 83 | psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010400U); |
| 84 | psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U); |
| 85 | psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); |
| 86 | psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); |
| 87 | psu_mask_write(0xFD1A00B4, 0x01003F07U, 0x01000200U); |
| 88 | psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010400U); |
| 89 | psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01011003U); |
| 90 | psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01010F03U); |
| 91 | psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); |
| 92 | psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); |
| 93 | psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U); |
| 94 | psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U); |
| 95 | psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); |
| 96 | psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); |
| 97 | psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000203U); |
| 98 | psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); |
| 99 | psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); |
| 100 | psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); |
| 101 | psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); |
| 102 | psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); |
| 103 | psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); |
| 104 | |
| 105 | return 1; |
| 106 | } |
| 107 | |
| 108 | static unsigned long psu_ddr_init_data(void) |
| 109 | { |
| 110 | psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); |
| 111 | psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x41040010U); |
| 112 | psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); |
| 113 | psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U); |
| 114 | psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U); |
| 115 | psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); |
| 116 | psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U); |
| 117 | psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); |
| 118 | psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); |
| 119 | psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); |
| 120 | psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x0081808BU); |
| 121 | psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); |
| 122 | psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); |
| 123 | psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); |
| 124 | psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU); |
| 125 | psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U); |
| 126 | psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U); |
| 127 | psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U); |
| 128 | psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U); |
| 129 | psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U); |
| 130 | psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); |
| 131 | psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U); |
| 132 | psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U); |
| 133 | psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); |
| 134 | psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU); |
| 135 | psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x110C2412U); |
| 136 | psu_mask_write(0xFD070104, 0x001F1F7FU, 0x00040419U); |
| 137 | psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060DU); |
| 138 | psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU); |
| 139 | psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030309U); |
| 140 | psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U); |
| 141 | psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U); |
| 142 | psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U); |
| 143 | psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x03030D06U); |
| 144 | psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002020BU); |
| 145 | psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x7007010EU); |
| 146 | psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); |
| 147 | psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U); |
| 148 | psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x020196E5U); |
| 149 | psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU); |
| 150 | psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); |
| 151 | psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); |
| 152 | psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); |
| 153 | psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U); |
| 154 | psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x004100E1U); |
| 155 | psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U); |
| 156 | psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000906U); |
| 157 | psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); |
| 158 | psu_mask_write(0xFD070200, 0x0000001FU, 0x0000001FU); |
| 159 | psu_mask_write(0xFD070204, 0x001F1F1FU, 0x001F0A0AU); |
| 160 | psu_mask_write(0xFD070208, 0x0F0F0F0FU, 0x00000000U); |
| 161 | psu_mask_write(0xFD07020C, 0x0F0F0F0FU, 0x00000000U); |
| 162 | psu_mask_write(0xFD070210, 0x00000F0FU, 0x00000F0FU); |
| 163 | psu_mask_write(0xFD070214, 0x0F0F0F0FU, 0x080F0808U); |
| 164 | psu_mask_write(0xFD070218, 0x8F0F0F0FU, 0x0F080808U); |
| 165 | psu_mask_write(0xFD07021C, 0x00000F0FU, 0x00000F0FU); |
| 166 | psu_mask_write(0xFD070220, 0x00001F1FU, 0x00000808U); |
| 167 | psu_mask_write(0xFD070224, 0x0F0F0F0FU, 0x08080808U); |
| 168 | psu_mask_write(0xFD070228, 0x0F0F0F0FU, 0x08080808U); |
| 169 | psu_mask_write(0xFD07022C, 0x0000000FU, 0x00000008U); |
| 170 | psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U); |
| 171 | psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U); |
| 172 | psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); |
| 173 | psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); |
| 174 | psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); |
| 175 | psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); |
| 176 | psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); |
| 177 | psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); |
| 178 | psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); |
| 179 | psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); |
| 180 | psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); |
| 181 | psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); |
| 182 | psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); |
| 183 | psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); |
| 184 | psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); |
| 185 | psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); |
| 186 | psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); |
| 187 | psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); |
| 188 | psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); |
| 189 | psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); |
| 190 | psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); |
| 191 | psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); |
| 192 | psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); |
| 193 | psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); |
| 194 | psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); |
| 195 | psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); |
| 196 | psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); |
| 197 | psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); |
| 198 | psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); |
| 199 | psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); |
| 200 | psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); |
| 201 | psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); |
| 202 | psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); |
| 203 | psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); |
| 204 | psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); |
| 205 | psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); |
| 206 | psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); |
| 207 | psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); |
| 208 | psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); |
| 209 | psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); |
| 210 | psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); |
| 211 | psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); |
| 212 | psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); |
| 213 | psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); |
| 214 | psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); |
| 215 | psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); |
| 216 | psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); |
| 217 | psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); |
| 218 | psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); |
| 219 | psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); |
| 220 | psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); |
| 221 | psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); |
| 222 | psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); |
| 223 | psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); |
| 224 | psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); |
| 225 | psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); |
| 226 | psu_mask_write(0xFD1A0108, 0x0000000CU, 0x00000000U); |
| 227 | psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U); |
| 228 | psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10010U); |
| 229 | psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); |
| 230 | psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); |
| 231 | psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x0AC85590U); |
| 232 | psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0x41540B00U); |
| 233 | psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U); |
| 234 | psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U); |
| 235 | psu_mask_write(0xFD0800C0, 0xFFFFFFFFU, 0x000000D3U); |
| 236 | psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU); |
| 237 | psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x06240F08U); |
| 238 | psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28170008U); |
| 239 | psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x00070300U); |
| 240 | psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U); |
| 241 | psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01162B07U); |
| 242 | psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00320F08U); |
| 243 | psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU); |
| 244 | psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); |
| 245 | psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); |
| 246 | psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); |
| 247 | psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000200U); |
| 248 | psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U); |
| 249 | psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U); |
| 250 | psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U); |
| 251 | psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U); |
| 252 | psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U); |
| 253 | psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U); |
| 254 | psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U); |
| 255 | psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U); |
| 256 | psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU); |
| 257 | psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); |
| 258 | psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU); |
| 259 | psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U); |
| 260 | psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U); |
| 261 | psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); |
| 262 | psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); |
| 263 | psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); |
| 264 | psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U); |
| 265 | psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U); |
| 266 | psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); |
| 267 | psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U); |
| 268 | psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U); |
| 269 | psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U); |
| 270 | psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU); |
| 271 | psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U); |
| 272 | psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); |
| 273 | psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); |
| 274 | psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); |
| 275 | psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); |
| 276 | psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); |
| 277 | psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); |
| 278 | psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); |
| 279 | psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U); |
| 280 | psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU); |
| 281 | psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); |
| 282 | psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); |
| 283 | psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU); |
| 284 | psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); |
| 285 | psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU); |
| 286 | psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09094F4FU); |
| 287 | psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); |
| 288 | psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); |
| 289 | psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU); |
| 290 | psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09094F4FU); |
| 291 | psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); |
| 292 | psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); |
| 293 | psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); |
| 294 | psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B03CU); |
| 295 | psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09094F4FU); |
| 296 | psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); |
| 297 | psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); |
| 298 | psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); |
| 299 | psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B03CU); |
| 300 | psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09094F4FU); |
| 301 | psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); |
| 302 | psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U); |
| 303 | psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU); |
| 304 | psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B03CU); |
| 305 | psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09094F4FU); |
| 306 | psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); |
| 307 | psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U); |
| 308 | psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU); |
| 309 | psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU); |
| 310 | psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09094F4FU); |
| 311 | psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); |
| 312 | psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U); |
| 313 | psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU); |
| 314 | psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B03CU); |
| 315 | psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09094F4FU); |
| 316 | psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); |
| 317 | psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U); |
| 318 | psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU); |
| 319 | psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU); |
| 320 | psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09094F4FU); |
| 321 | psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); |
| 322 | psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x40800624U); |
| 323 | psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x00007F00U); |
| 324 | psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0E00B03CU); |
| 325 | psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09094F4FU); |
| 326 | psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); |
| 327 | psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); |
| 328 | psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U); |
| 329 | psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); |
| 330 | psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U); |
| 331 | psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U); |
| 332 | psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); |
| 333 | psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U); |
| 334 | psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); |
| 335 | psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U); |
| 336 | psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U); |
| 337 | psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU); |
| 338 | psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U); |
| 339 | psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U); |
| 340 | psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U); |
| 341 | psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U); |
| 342 | psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU); |
| 343 | psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U); |
| 344 | psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U); |
| 345 | psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U); |
| 346 | psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U); |
| 347 | psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x2A019FFEU); |
| 348 | psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x01100000U); |
| 349 | psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01264300U); |
| 350 | psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U); |
| 351 | psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70800000U); |
| 352 | psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x01100000U); |
| 353 | psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); |
| 354 | |
| 355 | return 1; |
| 356 | } |
| 357 | |
| 358 | static unsigned long psu_mio_init_data(void) |
| 359 | { |
| 360 | psu_mask_write(0xFF180000, 0x000000FEU, 0x00000080U); |
| 361 | psu_mask_write(0xFF180004, 0x000000FEU, 0x00000080U); |
| 362 | psu_mask_write(0xFF180008, 0x000000FEU, 0x00000080U); |
| 363 | psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000080U); |
| 364 | psu_mask_write(0xFF180010, 0x000000FEU, 0x00000080U); |
| 365 | psu_mask_write(0xFF180014, 0x000000FEU, 0x00000080U); |
| 366 | psu_mask_write(0xFF180018, 0x000000FEU, 0x00000040U); |
| 367 | psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000040U); |
| 368 | psu_mask_write(0xFF180020, 0x000000FEU, 0x00000000U); |
| 369 | psu_mask_write(0xFF180024, 0x000000FEU, 0x00000004U); |
| 370 | psu_mask_write(0xFF180028, 0x000000FEU, 0x00000004U); |
| 371 | psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000004U); |
| 372 | psu_mask_write(0xFF180030, 0x000000FEU, 0x00000004U); |
| 373 | psu_mask_write(0xFF180034, 0x000000FEU, 0x00000004U); |
| 374 | psu_mask_write(0xFF180038, 0x000000FEU, 0x00000004U); |
| 375 | psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000004U); |
| 376 | psu_mask_write(0xFF180040, 0x000000FEU, 0x00000004U); |
| 377 | psu_mask_write(0xFF180044, 0x000000FEU, 0x00000004U); |
| 378 | psu_mask_write(0xFF180048, 0x000000FEU, 0x00000004U); |
| 379 | psu_mask_write(0xFF18004C, 0x000000FEU, 0x00000004U); |
| 380 | psu_mask_write(0xFF180050, 0x000000FEU, 0x00000004U); |
| 381 | psu_mask_write(0xFF180054, 0x000000FEU, 0x00000004U); |
| 382 | psu_mask_write(0xFF180058, 0x000000FEU, 0x00000004U); |
| 383 | psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000004U); |
| 384 | psu_mask_write(0xFF180060, 0x000000FEU, 0x00000004U); |
| 385 | psu_mask_write(0xFF180064, 0x000000FEU, 0x00000004U); |
| 386 | psu_mask_write(0xFF180068, 0x000000FEU, 0x00000060U); |
| 387 | psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000060U); |
| 388 | psu_mask_write(0xFF180070, 0x000000FEU, 0x00000060U); |
| 389 | psu_mask_write(0xFF180074, 0x000000FEU, 0x00000060U); |
| 390 | psu_mask_write(0xFF180078, 0x000000FEU, 0x00000004U); |
| 391 | psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000008U); |
| 392 | psu_mask_write(0xFF180080, 0x000000FEU, 0x00000020U); |
| 393 | psu_mask_write(0xFF180084, 0x000000FEU, 0x00000020U); |
| 394 | psu_mask_write(0xFF180088, 0x000000FEU, 0x00000000U); |
| 395 | psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000000U); |
| 396 | psu_mask_write(0xFF180090, 0x000000FEU, 0x00000000U); |
| 397 | psu_mask_write(0xFF180094, 0x000000FEU, 0x00000000U); |
| 398 | psu_mask_write(0xFF180098, 0x000000FEU, 0x00000020U); |
| 399 | psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000020U); |
| 400 | psu_mask_write(0xFF1800A0, 0x000000FEU, 0x000000C0U); |
| 401 | psu_mask_write(0xFF1800A4, 0x000000FEU, 0x000000C0U); |
| 402 | psu_mask_write(0xFF1800A8, 0x000000FEU, 0x000000C0U); |
| 403 | psu_mask_write(0xFF1800AC, 0x000000FEU, 0x000000C0U); |
| 404 | psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000080U); |
| 405 | psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000080U); |
| 406 | psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000080U); |
| 407 | psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000080U); |
| 408 | psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000080U); |
| 409 | psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000080U); |
| 410 | psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000000U); |
| 411 | psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000000U); |
| 412 | psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000002U); |
| 413 | psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000002U); |
| 414 | psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000002U); |
| 415 | psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000002U); |
| 416 | psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000002U); |
| 417 | psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000002U); |
| 418 | psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000002U); |
| 419 | psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000002U); |
| 420 | psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000002U); |
| 421 | psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000002U); |
| 422 | psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000002U); |
| 423 | psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000002U); |
| 424 | psu_mask_write(0xFF180100, 0x000000FEU, 0x00000004U); |
| 425 | psu_mask_write(0xFF180104, 0x000000FEU, 0x00000004U); |
| 426 | psu_mask_write(0xFF180108, 0x000000FEU, 0x00000004U); |
| 427 | psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000004U); |
| 428 | psu_mask_write(0xFF180110, 0x000000FEU, 0x00000004U); |
| 429 | psu_mask_write(0xFF180114, 0x000000FEU, 0x00000004U); |
| 430 | psu_mask_write(0xFF180118, 0x000000FEU, 0x00000004U); |
| 431 | psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000004U); |
| 432 | psu_mask_write(0xFF180120, 0x000000FEU, 0x00000004U); |
| 433 | psu_mask_write(0xFF180124, 0x000000FEU, 0x00000004U); |
| 434 | psu_mask_write(0xFF180128, 0x000000FEU, 0x00000004U); |
| 435 | psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000004U); |
| 436 | psu_mask_write(0xFF180130, 0x000000FEU, 0x000000A0U); |
| 437 | psu_mask_write(0xFF180134, 0x000000FEU, 0x000000A0U); |
| 438 | psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0xEC000C00U); |
| 439 | psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0xFC000642U); |
| 440 | psu_mask_write(0xFF18020C, 0x00003FFFU, 0x0000000BU); |
| 441 | psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); |
| 442 | psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); |
| 443 | psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); |
| 444 | psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); |
| 445 | psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); |
| 446 | psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); |
| 447 | psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); |
| 448 | psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); |
| 449 | psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); |
| 450 | psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); |
| 451 | psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); |
| 452 | psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); |
| 453 | psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); |
| 454 | psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); |
| 455 | psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); |
| 456 | psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); |
| 457 | psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); |
| 458 | psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); |
| 459 | psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); |
| 460 | |
| 461 | return 1; |
| 462 | } |
| 463 | |
| 464 | static unsigned long psu_peripherals_init_data(void) |
| 465 | { |
| 466 | psu_mask_write(0xFD1A0100, 0x000F807CU, 0x00000000U); |
| 467 | psu_mask_write(0xFF5E0238, 0x001A0000U, 0x00000000U); |
| 468 | psu_mask_write(0xFF5E023C, 0x0093C018U, 0x00000000U); |
| 469 | psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000000U); |
| 470 | psu_mask_write(0xFF5E0238, 0x00010000U, 0x00000000U); |
| 471 | psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000000U); |
| 472 | psu_mask_write(0xFF9E0080, 0x00000001U, 0x00000001U); |
| 473 | psu_mask_write(0xFF9E007C, 0x00000001U, 0x00000001U); |
| 474 | psu_mask_write(0xFF5E0238, 0x00000180U, 0x00000000U); |
| 475 | psu_mask_write(0xFF5E0238, 0x00000200U, 0x00000000U); |
| 476 | psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U); |
| 477 | psu_mask_write(0xFF5E0238, 0x00000018U, 0x00000000U); |
| 478 | psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U); |
| 479 | psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U); |
Michal Simek | 60f0783 | 2018-03-28 14:49:43 +0200 | [diff] [blame] | 480 | psu_mask_write(0xFF5E0238, 0x00040000U, 0x00000000U); |
| 481 | psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); |
| 482 | psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); |
| 483 | psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); |
| 484 | psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); |
| 485 | psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5DD17U); |
| 486 | psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); |
| 487 | |
| 488 | return 1; |
| 489 | } |
| 490 | |
| 491 | static unsigned long psu_serdes_init_data(void) |
| 492 | { |
| 493 | psu_mask_write(0xFD410000, 0x0000001FU, 0x0000000DU); |
| 494 | psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U); |
| 495 | psu_mask_write(0xFD402860, 0x00000080U, 0x00000080U); |
| 496 | psu_mask_write(0xFD402864, 0x00000084U, 0x00000004U); |
| 497 | psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U); |
| 498 | psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U); |
| 499 | psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU); |
| 500 | psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U); |
| 501 | psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U); |
| 502 | psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U); |
| 503 | psu_mask_write(0xFD4010CC, 0x00000020U, 0x00000020U); |
| 504 | psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); |
| 505 | psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); |
| 506 | psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); |
| 507 | psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); |
| 508 | psu_mask_write(0xFD40189C, 0x00000080U, 0x00000080U); |
| 509 | psu_mask_write(0xFD4018F8, 0x000000FFU, 0x00000064U); |
| 510 | psu_mask_write(0xFD4018FC, 0x000000FFU, 0x00000064U); |
| 511 | psu_mask_write(0xFD401990, 0x000000FFU, 0x00000011U); |
| 512 | psu_mask_write(0xFD401924, 0x000000FFU, 0x00000004U); |
| 513 | psu_mask_write(0xFD401928, 0x000000FFU, 0x000000FEU); |
| 514 | psu_mask_write(0xFD401900, 0x000000FFU, 0x00000064U); |
| 515 | psu_mask_write(0xFD40192C, 0x000000FFU, 0x00000000U); |
| 516 | psu_mask_write(0xFD401980, 0x000000FFU, 0x000000FFU); |
| 517 | psu_mask_write(0xFD401914, 0x000000FFU, 0x000000F7U); |
| 518 | psu_mask_write(0xFD401918, 0x00000001U, 0x00000001U); |
| 519 | psu_mask_write(0xFD401940, 0x000000FFU, 0x000000F7U); |
| 520 | psu_mask_write(0xFD401944, 0x00000001U, 0x00000001U); |
| 521 | psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); |
| 522 | psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); |
| 523 | psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); |
| 524 | psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); |
| 525 | psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); |
| 526 | psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); |
| 527 | psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); |
| 528 | psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); |
| 529 | psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); |
| 530 | psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); |
| 531 | psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); |
| 532 | psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); |
| 533 | psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); |
| 534 | psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); |
| 535 | psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); |
| 536 | psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); |
| 537 | psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); |
| 538 | psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); |
| 539 | psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); |
| 540 | psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); |
| 541 | psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); |
| 542 | psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); |
| 543 | psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); |
| 544 | psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); |
| 545 | psu_mask_write(0xFD401978, 0x00000010U, 0x00000010U); |
| 546 | psu_mask_write(0xFD405978, 0x00000010U, 0x00000010U); |
| 547 | psu_mask_write(0xFD409978, 0x00000010U, 0x00000010U); |
| 548 | psu_mask_write(0xFD40D978, 0x00000010U, 0x00000010U); |
| 549 | psu_mask_write(0xFD3D001C, 0xFFFFFFFFU, 0x00000001U); |
| 550 | psu_mask_write(0xFD480314, 0xFFFFFFFFU, 0x00000004U); |
| 551 | psu_mask_write(0xFD410010, 0x00000077U, 0x00000041U); |
| 552 | psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U); |
| 553 | psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U); |
| 554 | psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U); |
| 555 | psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U); |
| 556 | |
| 557 | return 1; |
| 558 | } |
| 559 | |
| 560 | static unsigned long psu_resetout_init_data(void) |
| 561 | { |
| 562 | psu_mask_write(0xFF5E023C, 0x00000800U, 0x00000000U); |
| 563 | psu_mask_write(0xFF5E023C, 0x00000280U, 0x00000000U); |
| 564 | psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000000U); |
| 565 | psu_mask_write(0xFD1A0100, 0x000C0000U, 0x00000000U); |
| 566 | psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U); |
| 567 | psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U); |
| 568 | psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U); |
| 569 | psu_mask_write(0xFE30C200, 0x00023FFFU, 0x00022457U); |
| 570 | psu_mask_write(0xFE30C630, 0x003FFF00U, 0x00000000U); |
| 571 | psu_mask_write(0xFE30C12C, 0x00004000U, 0x00004000U); |
| 572 | psu_mask_write(0xFE30C11C, 0x00000400U, 0x00000400U); |
| 573 | psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); |
| 574 | psu_mask_write(0xFD48001C, 0x0000FFFFU, 0x00000000U); |
| 575 | psu_mask_write(0xFD480020, 0x0000FFFFU, 0x0000FFF0U); |
| 576 | psu_mask_write(0xFD480024, 0x0000FFFFU, 0x00000000U); |
| 577 | psu_mask_write(0xFD480028, 0x0000FFFFU, 0x00000000U); |
| 578 | psu_mask_write(0xFD48002C, 0x0000FFFFU, 0x00000000U); |
| 579 | psu_mask_write(0xFD480030, 0x0000FFFFU, 0x00000000U); |
| 580 | psu_mask_write(0xFD480034, 0x0000FFFFU, 0x00000000U); |
| 581 | psu_mask_write(0xFD480038, 0x0000FFFFU, 0x00000000U); |
| 582 | psu_mask_write(0xFD48003C, 0x0000FFFFU, 0x00000000U); |
| 583 | psu_mask_write(0xFD480040, 0x0000FFFFU, 0x00000000U); |
| 584 | psu_mask_write(0xFD480044, 0x0000FFFFU, 0x00000000U); |
| 585 | psu_mask_write(0xFD480048, 0x0000FFFFU, 0x00000000U); |
| 586 | psu_mask_write(0xFD48006C, 0x00000738U, 0x00000138U); |
| 587 | psu_mask_write(0xFD4800C8, 0x0000FFF0U, 0x00000000U); |
| 588 | psu_mask_write(0xFD4801A4, 0x000007FFU, 0x00000172U); |
| 589 | psu_mask_write(0xFD4801A8, 0x00003FFFU, 0x00000248U); |
| 590 | psu_mask_write(0xFD4801AC, 0x000007FFU, 0x00000008U); |
| 591 | psu_mask_write(0xFD4801B0, 0x000007FFU, 0x00000020U); |
| 592 | psu_mask_write(0xFD4801B4, 0x0000FFFFU, 0x00007E04U); |
| 593 | psu_mask_write(0xFD480088, 0x0000FFFFU, 0x00000100U); |
| 594 | psu_mask_write(0xFD4800D4, 0x000000FFU, 0x00000060U); |
| 595 | psu_mask_write(0xFD4800A4, 0x000003FFU, 0x00000060U); |
| 596 | psu_mask_write(0xFD480184, 0x00000FFFU, 0x00000041U); |
| 597 | psu_mask_write(0xFD480190, 0x00000040U, 0x00000040U); |
| 598 | psu_mask_write(0xFD480194, 0x0000FFE2U, 0x00000000U); |
| 599 | psu_mask_write(0xFD480200, 0xFFFFFFFFU, 0x10EED011U); |
| 600 | psu_mask_write(0xFD480204, 0xFFFFFFFFU, 0x10EE0007U); |
| 601 | psu_mask_write(0xFD480208, 0x000000FFU, 0x00000000U); |
| 602 | psu_mask_write(0xFD480060, 0x0000FFFFU, 0x00008000U); |
| 603 | psu_mask_write(0xFD480064, 0x000001FFU, 0x00000105U); |
| 604 | psu_mask_write(0xFD0E0000, 0x00000007U, 0x00000000U); |
| 605 | psu_mask_write(0xFD480010, 0x00001000U, 0x00000000U); |
| 606 | psu_mask_write(0xFD480164, 0x00001FFEU, 0x00000000U); |
| 607 | psu_mask_write(0xFD4800AC, 0x00000F00U, 0x00000000U); |
| 608 | psu_mask_write(0xFD4800B4, 0x00000007U, 0x00000000U); |
| 609 | psu_mask_write(0xFD48031C, 0x00000002U, 0x00000000U); |
| 610 | psu_mask_write(0xFD48008C, 0x00003000U, 0x00000000U); |
| 611 | psu_mask_write(0xFD480094, 0x00004000U, 0x00004000U); |
| 612 | psu_mask_write(0xFD1A0100, 0x00020000U, 0x00000000U); |
| 613 | mask_poll(0xFD4023E4, 0x00000010U); |
| 614 | mask_poll(0xFD4063E4, 0x00000010U); |
| 615 | |
| 616 | return 1; |
| 617 | } |
| 618 | |
| 619 | static unsigned long psu_resetin_init_data(void) |
| 620 | { |
| 621 | psu_mask_write(0xFF5E023C, 0x00000A80U, 0x00000A80U); |
| 622 | psu_mask_write(0xFF5E0230, 0x00000004U, 0x00000004U); |
| 623 | psu_mask_write(0xFD1A0100, 0x000E0000U, 0x000E0000U); |
| 624 | psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU); |
| 625 | psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U); |
| 626 | psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U); |
| 627 | |
| 628 | return 1; |
| 629 | } |
| 630 | |
| 631 | static unsigned long psu_afi_config(void) |
| 632 | { |
| 633 | psu_mask_write(0xFD1A0100, 0x00001F80U, 0x00000000U); |
| 634 | psu_mask_write(0xFF5E023C, 0x00080000U, 0x00000000U); |
| 635 | |
| 636 | return 1; |
| 637 | } |
| 638 | |
| 639 | static unsigned long psu_ddr_phybringup_data(void) |
| 640 | { |
| 641 | unsigned int regval = 0; |
| 642 | unsigned int pll_retry = 10; |
| 643 | unsigned int pll_locked = 0; |
| 644 | |
| 645 | while ((pll_retry > 0) && (!pll_locked)) { |
| 646 | Xil_Out32(0xFD080004, 0x00040010); |
| 647 | Xil_Out32(0xFD080004, 0x00040011); |
| 648 | |
| 649 | while ((Xil_In32(0xFD080030) & 0x1) != 1) |
| 650 | ; |
| 651 | |
| 652 | pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31; |
| 653 | pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16; |
| 654 | pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16; |
| 655 | pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16; |
| 656 | pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16; |
| 657 | pll_retry--; |
| 658 | } |
| 659 | Xil_Out32(0xFD0800C0, Xil_In32(0xFD0800C0) | (pll_retry << 16)); |
| 660 | Xil_Out32(0xFD080004U, 0x00040063U); |
| 661 | |
| 662 | while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) |
| 663 | ; |
| 664 | prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); |
| 665 | |
| 666 | while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) |
| 667 | ; |
| 668 | Xil_Out32(0xFD0701B0U, 0x00000001U); |
| 669 | Xil_Out32(0xFD070320U, 0x00000001U); |
| 670 | while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) |
| 671 | ; |
| 672 | prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); |
| 673 | Xil_Out32(0xFD080004, 0x0004FE01); |
| 674 | regval = Xil_In32(0xFD080030); |
| 675 | while (regval != 0x80000FFF) |
| 676 | regval = Xil_In32(0xFD080030); |
| 677 | |
| 678 | Xil_Out32(0xFD080200U, 0x100091C7U); |
| 679 | Xil_Out32(0xFD080018U, 0x00F01EEFU); |
| 680 | prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U); |
| 681 | prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U); |
| 682 | prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U); |
| 683 | prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U); |
| 684 | prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U); |
| 685 | prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U); |
| 686 | |
| 687 | Xil_Out32(0xFD080004, 0x00060001); |
| 688 | regval = Xil_In32(0xFD080030); |
| 689 | while ((regval & 0x80004001) != 0x80004001) |
| 690 | |
| 691 | regval = Xil_In32(0xFD080030); |
| 692 | |
| 693 | prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U); |
| 694 | prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U); |
| 695 | prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U); |
| 696 | prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U); |
| 697 | prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U); |
| 698 | prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U); |
| 699 | |
| 700 | Xil_Out32(0xFD080200U, 0x800091C7U); |
| 701 | Xil_Out32(0xFD080018U, 0x00F122E7U); |
| 702 | |
| 703 | Xil_Out32(0xFD080004, 0x0000C001); |
| 704 | regval = Xil_In32(0xFD080030); |
| 705 | while ((regval & 0x80000C01) != 0x80000C01) |
| 706 | |
| 707 | regval = Xil_In32(0xFD080030); |
| 708 | |
| 709 | Xil_Out32(0xFD070180U, 0x01000040U); |
| 710 | Xil_Out32(0xFD070060U, 0x00000000U); |
| 711 | prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); |
| 712 | |
| 713 | return 1; |
| 714 | } |
| 715 | |
| 716 | static int serdes_enb_coarse_saturation(void) |
| 717 | { |
| 718 | Xil_Out32(0xFD402094, 0x00000010); |
| 719 | Xil_Out32(0xFD406094, 0x00000010); |
| 720 | Xil_Out32(0xFD40A094, 0x00000010); |
| 721 | Xil_Out32(0xFD40E094, 0x00000010); |
| 722 | return 1; |
| 723 | } |
| 724 | |
| 725 | static int serdes_fixcal_code(void) |
| 726 | { |
| 727 | int maskstatus = 1; |
| 728 | unsigned int rdata = 0; |
| 729 | unsigned int match_pmos_code[23]; |
| 730 | unsigned int match_nmos_code[23]; |
| 731 | unsigned int match_ical_code[7]; |
| 732 | unsigned int match_rcal_code[7]; |
| 733 | unsigned int p_code = 0; |
| 734 | unsigned int n_code = 0; |
| 735 | unsigned int i_code = 0; |
| 736 | unsigned int r_code = 0; |
| 737 | unsigned int repeat_count = 0; |
| 738 | unsigned int L3_TM_CALIB_DIG20 = 0; |
| 739 | unsigned int L3_TM_CALIB_DIG19 = 0; |
| 740 | unsigned int L3_TM_CALIB_DIG18 = 0; |
| 741 | unsigned int L3_TM_CALIB_DIG16 = 0; |
| 742 | unsigned int L3_TM_CALIB_DIG15 = 0; |
| 743 | unsigned int L3_TM_CALIB_DIG14 = 0; |
| 744 | int i = 0; |
| 745 | int count = 0; |
| 746 | |
| 747 | rdata = Xil_In32(0xFD40289C); |
| 748 | rdata = rdata & ~0x03; |
| 749 | rdata = rdata | 0x1; |
| 750 | Xil_Out32(0xFD40289C, rdata); |
| 751 | |
| 752 | do { |
| 753 | if (count == 1100000) |
| 754 | break; |
| 755 | rdata = Xil_In32(0xFD402B1C); |
| 756 | count++; |
| 757 | } while ((rdata & 0x0000000E) != 0x0000000E); |
| 758 | |
| 759 | for (i = 0; i < 23; i++) { |
| 760 | match_pmos_code[i] = 0; |
| 761 | match_nmos_code[i] = 0; |
| 762 | } |
| 763 | for (i = 0; i < 7; i++) { |
| 764 | match_ical_code[i] = 0; |
| 765 | match_rcal_code[i] = 0; |
| 766 | } |
| 767 | |
| 768 | do { |
| 769 | Xil_Out32(0xFD410010, 0x00000000); |
| 770 | Xil_Out32(0xFD410014, 0x00000000); |
| 771 | |
| 772 | Xil_Out32(0xFD410010, 0x00000001); |
| 773 | Xil_Out32(0xFD410014, 0x00000000); |
| 774 | |
| 775 | maskstatus = mask_poll(0xFD40EF14, 0x2); |
| 776 | if (maskstatus == 0) { |
| 777 | /* xil_printf("#SERDES initialization timed out\n\r");*/ |
| 778 | return maskstatus; |
| 779 | } |
| 780 | |
| 781 | p_code = mask_read(0xFD40EF18, 0xFFFFFFFF); |
| 782 | n_code = mask_read(0xFD40EF1C, 0xFFFFFFFF); |
| 783 | ; |
| 784 | i_code = mask_read(0xFD40EF24, 0xFFFFFFFF); |
| 785 | r_code = mask_read(0xFD40EF28, 0xFFFFFFFF); |
| 786 | ; |
| 787 | |
| 788 | if ((p_code >= 0x26) && (p_code <= 0x3C)) |
| 789 | match_pmos_code[p_code - 0x26] += 1; |
| 790 | |
| 791 | if ((n_code >= 0x26) && (n_code <= 0x3C)) |
| 792 | match_nmos_code[n_code - 0x26] += 1; |
| 793 | |
| 794 | if ((i_code >= 0xC) && (i_code <= 0x12)) |
| 795 | match_ical_code[i_code - 0xC] += 1; |
| 796 | |
| 797 | if ((r_code >= 0x6) && (r_code <= 0xC)) |
| 798 | match_rcal_code[r_code - 0x6] += 1; |
| 799 | |
| 800 | } while (repeat_count++ < 10); |
| 801 | |
| 802 | for (i = 0; i < 23; i++) { |
| 803 | if (match_pmos_code[i] >= match_pmos_code[0]) { |
| 804 | match_pmos_code[0] = match_pmos_code[i]; |
| 805 | p_code = 0x26 + i; |
| 806 | } |
| 807 | if (match_nmos_code[i] >= match_nmos_code[0]) { |
| 808 | match_nmos_code[0] = match_nmos_code[i]; |
| 809 | n_code = 0x26 + i; |
| 810 | } |
| 811 | } |
| 812 | |
| 813 | for (i = 0; i < 7; i++) { |
| 814 | if (match_ical_code[i] >= match_ical_code[0]) { |
| 815 | match_ical_code[0] = match_ical_code[i]; |
| 816 | i_code = 0xC + i; |
| 817 | } |
| 818 | if (match_rcal_code[i] >= match_rcal_code[0]) { |
| 819 | match_rcal_code[0] = match_rcal_code[i]; |
| 820 | r_code = 0x6 + i; |
| 821 | } |
| 822 | } |
| 823 | |
| 824 | L3_TM_CALIB_DIG20 = mask_read(0xFD40EC50, 0xFFFFFFF0); |
| 825 | L3_TM_CALIB_DIG20 = L3_TM_CALIB_DIG20 | 0x8 | ((p_code >> 2) & 0x7); |
| 826 | |
| 827 | L3_TM_CALIB_DIG19 = mask_read(0xFD40EC4C, 0xFFFFFF18); |
| 828 | L3_TM_CALIB_DIG19 = L3_TM_CALIB_DIG19 | ((p_code & 0x3) << 6) |
| 829 | | 0x20 | 0x4 | ((n_code >> 3) & 0x3); |
| 830 | |
| 831 | L3_TM_CALIB_DIG18 = mask_read(0xFD40EC48, 0xFFFFFF0F); |
| 832 | L3_TM_CALIB_DIG18 = L3_TM_CALIB_DIG18 | ((n_code & 0x7) << 5) | 0x10; |
| 833 | |
| 834 | L3_TM_CALIB_DIG16 = mask_read(0xFD40EC40, 0xFFFFFFF8); |
| 835 | L3_TM_CALIB_DIG16 = L3_TM_CALIB_DIG16 | ((r_code >> 1) & 0x7); |
| 836 | |
| 837 | L3_TM_CALIB_DIG15 = mask_read(0xFD40EC3C, 0xFFFFFF30); |
| 838 | L3_TM_CALIB_DIG15 = L3_TM_CALIB_DIG15 | ((r_code & 0x1) << 7) |
| 839 | | 0x40 | 0x8 | ((i_code >> 1) & 0x7); |
| 840 | |
| 841 | L3_TM_CALIB_DIG14 = mask_read(0xFD40EC38, 0xFFFFFF3F); |
| 842 | L3_TM_CALIB_DIG14 = L3_TM_CALIB_DIG14 | ((i_code & 0x1) << 7) | 0x40; |
| 843 | |
| 844 | Xil_Out32(0xFD40EC50, L3_TM_CALIB_DIG20); |
| 845 | Xil_Out32(0xFD40EC4C, L3_TM_CALIB_DIG19); |
| 846 | Xil_Out32(0xFD40EC48, L3_TM_CALIB_DIG18); |
| 847 | Xil_Out32(0xFD40EC40, L3_TM_CALIB_DIG16); |
| 848 | Xil_Out32(0xFD40EC3C, L3_TM_CALIB_DIG15); |
| 849 | Xil_Out32(0xFD40EC38, L3_TM_CALIB_DIG14); |
| 850 | return maskstatus; |
| 851 | } |
| 852 | |
| 853 | static int init_serdes(void) |
| 854 | { |
| 855 | int status = 1; |
| 856 | |
| 857 | status &= psu_resetin_init_data(); |
| 858 | |
| 859 | status &= serdes_fixcal_code(); |
| 860 | status &= serdes_enb_coarse_saturation(); |
| 861 | |
| 862 | status &= psu_serdes_init_data(); |
| 863 | status &= psu_resetout_init_data(); |
| 864 | |
| 865 | return status; |
| 866 | } |
| 867 | |
| 868 | static void init_peripheral(void) |
| 869 | { |
| 870 | psu_mask_write(0xFD5F0018, 0x8000001FU, 0x8000001FU); |
| 871 | } |
| 872 | |
| 873 | int psu_init(void) |
| 874 | { |
| 875 | int status = 1; |
| 876 | |
| 877 | status &= psu_mio_init_data(); |
| 878 | status &= psu_pll_init_data(); |
| 879 | status &= psu_clock_init_data(); |
| 880 | status &= psu_ddr_init_data(); |
| 881 | status &= psu_ddr_phybringup_data(); |
| 882 | status &= psu_peripherals_init_data(); |
| 883 | status &= init_serdes(); |
| 884 | init_peripheral(); |
| 885 | |
| 886 | status &= psu_afi_config(); |
| 887 | |
| 888 | if (status == 0) |
| 889 | return 1; |
| 890 | return 0; |
| 891 | } |