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git01.mediatek.com / filogic / uboot / 1a9fe83841e2cacdcb46c70c2e712c5bcf006b03 / . / arch / arm / dts / stm32f746-disco.dts
blob: 9430dc08ec53327c389d8223c8b1863c0a87feb4 [file] [log] [blame]
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+ OR X11
Michael Kurzbccef712017-01-22 16:04:23 +0100[diff] [blame]2/*
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]3 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
Michael Kurzbccef712017-01-22 16:04:23 +0100[diff] [blame]4 *
Michael Kurzbccef712017-01-22 16:04:23 +0100[diff] [blame]5 */
6
7/dts-v1/;
8#include "stm32f746.dtsi"
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]9#include "stm32f746-pinctrl.dtsi"
10#include <dt-bindings/input/input.h>
Patrice Chotardda8f8ef2018-08-06 09:38:18 +0200[diff] [blame]11#include <dt-bindings/gpio/gpio.h>
Michael Kurzbccef712017-01-22 16:04:23 +0100[diff] [blame]12
13/ {
14 model = "STMicroelectronics STM32F746-DISCO board";
15 compatible = "st,stm32f746-disco", "st,stm32f746";
16
17 chosen {
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]18 bootargs = "root=/dev/ram";
Michael Kurzbccef712017-01-22 16:04:23 +0100[diff] [blame]19 stdout-path = "serial0:115200n8";
20 };
21
Patrice Chotard62f56162020-11-06 08:11:58 +0100[diff] [blame]22 memory@c0000000 {
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100[diff] [blame]23 device_type = "memory";
Michael Kurzbccef712017-01-22 16:04:23 +0100[diff] [blame]24 reg = <0xC0000000 0x800000>;
25 };
26
27 aliases {
Vikas Manochada913d32017-02-12 10:25:47 -0800[diff] [blame]28 serial0 = &usart1;
Michael Kurzbccef712017-01-22 16:04:23 +0100[diff] [blame]29 };
Vikas Manocha9c7573e2017-04-10 15:03:00 -0700[diff] [blame]30
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]31 usbotg_hs_phy: usb-phy {
32 #phy-cells = <0>;
33 compatible = "usb-nop-xceiv";
34 clocks = <&rcc 0 STM32F7_AHB1_CLOCK(OTGHSULPI)>;
35 clock-names = "main_clk";
36 };
37
38 /* This turns on vbus for otg fs for host mode (dwc2) */
39 vcc5v_otg_fs: vcc5v-otg-fs-regulator {
40 compatible = "regulator-fixed";
41 gpio = <&gpiod 5 0>;
42 regulator-name = "vcc5_host1";
43 regulator-always-on;
44 };
45
46 mmc_vcard: mmc_vcard {
47 compatible = "regulator-fixed";
48 regulator-name = "mmc_vcard";
49 regulator-min-microvolt = <3300000>;
50 regulator-max-microvolt = <3300000>;
51 };
Michael Kurzbccef712017-01-22 16:04:23 +0100[diff] [blame]52};
53
Vikas Manochada913d32017-02-12 10:25:47 -0800[diff] [blame]54&clk_hse {
55 clock-frequency = <25000000>;
56};
57
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]58&i2c1 {
59 pinctrl-0 = <&i2c1_pins_b>;
Vikas Manocha6ad568c2017-02-12 10:25:51 -0800[diff] [blame]60 pinctrl-names = "default";
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]61 i2c-scl-rising-time-ns = <185>;
62 i2c-scl-falling-time-ns = <20>;
Vikas Manocha6ad568c2017-02-12 10:25:51 -0800[diff] [blame]63 status = "okay";
64};
65
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]66&sdio1 {
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100[diff] [blame]67 status = "okay";
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]68 vmmc-supply = <&mmc_vcard>;
Patrice Chotardda8f8ef2018-08-06 09:38:18 +0200[diff] [blame]69 cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100[diff] [blame]70 pinctrl-names = "default", "opendrain";
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]71 pinctrl-0 = <&sdio_pins_a>;
72 pinctrl-1 = <&sdio_pins_od_a>;
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100[diff] [blame]73 bus-width = <4>;
Patrice Chotard24dffa52019-02-19 16:49:05 +0100[diff] [blame]74};
75
76&usart1 {
77 pinctrl-0 = <&usart1_pins_b>;
78 pinctrl-names = "default";
79 status = "okay";
80};
81
82&usbotg_fs {
83 dr_mode = "host";
84 pinctrl-0 = <&usbotg_fs_pins_a>;
85 pinctrl-names = "default";
86 status = "okay";
87};
88
89&usbotg_hs {
90 dr_mode = "host";
91 phys = <&usbotg_hs_phy>;
92 phy-names = "usb2-phy";
93 pinctrl-0 = <&usbotg_hs_pins_b>;
94 pinctrl-names = "default";
95 status = "okay";
Patrice Chotard0d24b0d2017-12-12 10:14:59 +0100[diff] [blame]96};