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git01.mediatek.com / filogic / uboot / 1a9fe83841e2cacdcb46c70c2e712c5bcf006b03 / . / arch / arm / dts / am335x-pdu001-u-boot.dtsi
blob: f1860ee3e4656d03ca9f3d1fb3bfc27fc25ea054 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Felix Brack1ba8c9e2018-01-23 18:27:22 +0100[diff] [blame]2/*
3 * Copyright (C) 2018 EETS GmbH - https://www.eets.ch/
Felix Brack1ba8c9e2018-01-23 18:27:22 +0100[diff] [blame]4 */
5
Dario Binacchi2180d802020-12-30 00:06:37 +0100[diff] [blame]6#include "am33xx-u-boot.dtsi"
7
Felix Brack1ba8c9e2018-01-23 18:27:22 +0100[diff] [blame]8&l4_wkup {
9 u-boot,dm-pre-reloc;
Felix Brack39a102c2022-02-08 11:38:39 +0100[diff] [blame]10 segment@200000 {
11
12 target-module@10000 {
13 u-boot,dm-pre-reloc;
14 };
15 };
Felix Brack1ba8c9e2018-01-23 18:27:22 +0100[diff] [blame]16};
17
Dario Binacchi67e92c12020-12-30 00:16:27 +0100[diff] [blame]18&l4_per {
Felix Brack39a102c2022-02-08 11:38:39 +0100[diff] [blame]19 u-boot,dm-pre-reloc;
20 segment@100000 {
21 u-boot,dm-pre-reloc;
22
23 target-module@a6000 {
24 u-boot,dm-pre-reloc;
25 };
26 };
Dario Binacchi67e92c12020-12-30 00:16:27 +0100[diff] [blame]27
28 segment@300000 {
29
30 target-module@e000 {
31 u-boot,dm-pre-reloc;
32
33 lcdc: lcdc@0 {
34 u-boot,dm-pre-reloc;
35 };
36 };
37 };
38};
39
Felix Brack1ba8c9e2018-01-23 18:27:22 +0100[diff] [blame]40&scm {
41 u-boot,dm-pre-reloc;
42};
43
44&am33xx_pinmux {
45 u-boot,dm-pre-reloc;
46};
47
48&uart3_pins {
49 u-boot,dm-pre-reloc;
50};
51
52&uart3 {
53 u-boot,dm-pre-reloc;
54};
55
Felix Brack34f37552018-11-30 10:23:36 +0100[diff] [blame]56&mmc1 {
57 u-boot,dm-pre-reloc;
58};
59
Felix Brack1ba8c9e2018-01-23 18:27:22 +0100[diff] [blame]60&mmc1_pins {
61 u-boot,dm-pre-reloc;
62};
63
Felix Brack34f37552018-11-30 10:23:36 +0100[diff] [blame]64&mmc2 {
65 u-boot,dm-pre-reloc;
66};
67
Felix Brack1ba8c9e2018-01-23 18:27:22 +0100[diff] [blame]68&mmc2_pins {
69 u-boot,dm-pre-reloc;
70};