blob: 43d502b6ca8c82179ff9f5ee0dcb81371dd097e2 [file] [log] [blame]
Lokesh Vutla1a9dd212019-06-13 10:29:49 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Board specific initialization for J721E EVM
4 *
5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
6 * Lokesh Vutla <lokeshvutla@ti.com>
7 *
8 */
9
10#include <common.h>
11#include <asm/io.h>
12#include <spl.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
16int board_init(void)
17{
18 return 0;
19}
20
21int dram_init(void)
22{
23#ifdef CONFIG_PHYS_64BIT
24 gd->ram_size = 0x100000000;
25#else
26 gd->ram_size = 0x80000000;
27#endif
28
29 return 0;
30}
31
32ulong board_get_usable_ram_top(ulong total_size)
33{
34#ifdef CONFIG_PHYS_64BIT
35 /* Limit RAM used by U-Boot to the DDR low region */
36 if (gd->ram_top > 0x100000000)
37 return 0x100000000;
38#endif
39
40 return gd->ram_top;
41}
42
43int dram_init_banksize(void)
44{
45 /* Bank 0 declares the memory available in the DDR low region */
46 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
47 gd->bd->bi_dram[0].size = 0x80000000;
48 gd->ram_size = 0x80000000;
49
50#ifdef CONFIG_PHYS_64BIT
51 /* Bank 1 declares the memory available in the DDR high region */
52 gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
53 gd->bd->bi_dram[1].size = 0x80000000;
54 gd->ram_size = 0x100000000;
55#endif
56
57 return 0;
58}
59
60#ifdef CONFIG_SPL_LOAD_FIT
61int board_fit_config_name_match(const char *name)
62{
63 if (!strcmp(name, "k3-j721e-common-proc-board"))
64 return 0;
65
66 return -1;
67}
68#endif