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git01.mediatek.com / filogic / uboot / 1a92f83c87e39d0d372e37ab8219862fd9bcc2b6 / . / test / dm / misc.c
blob: 1abc9eee045306d626aba2cda129e6c51facace9 [file] [log] [blame]
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2018
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
5 */
6
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]7#include <dm.h>
8#include <dm/test.h>
9#include <misc.h>
Simon Glass75c4d412020-07-19 10:15:37 -0600[diff] [blame]10#include <test/test.h>
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]11#include <test/ut.h>
12
13static int dm_test_misc(struct unit_test_state *uts)
14{
15 struct udevice *dev;
16 u8 buf[16];
17 int id;
18 ulong last_ioctl;
19 bool enabled;
20
21 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "misc-test", &dev));
22
23 /* Read / write tests */
Simon Glass587dc402018-11-06 15:21:39 -0700[diff] [blame]24 ut_asserteq(4, misc_write(dev, 0, "TEST", 4));
25 ut_asserteq(5, misc_write(dev, 4, "WRITE", 5));
26 ut_asserteq(9, misc_read(dev, 0, buf, 9));
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]27
Simon Glassa3186e62020-05-10 12:52:45 -0600[diff] [blame]28 ut_asserteq_mem(buf, "TESTWRITE", 9);
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]29
30 /* Call tests */
31
32 id = 0;
33 ut_assertok(misc_call(dev, 0, &id, 4, buf, 16));
Simon Glassa3186e62020-05-10 12:52:45 -0600[diff] [blame]34 ut_asserteq_mem(buf, "Zero", 4);
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]35
36 id = 2;
37 ut_assertok(misc_call(dev, 0, &id, 4, buf, 16));
Simon Glassa3186e62020-05-10 12:52:45 -0600[diff] [blame]38 ut_asserteq_mem(buf, "Two", 3);
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]39
40 ut_assertok(misc_call(dev, 1, &id, 4, buf, 16));
Simon Glassa3186e62020-05-10 12:52:45 -0600[diff] [blame]41 ut_asserteq_mem(buf, "Forty-two", 9);
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]42
43 id = 1;
44 ut_assertok(misc_call(dev, 1, &id, 4, buf, 16));
Simon Glassa3186e62020-05-10 12:52:45 -0600[diff] [blame]45 ut_asserteq_mem(buf, "Forty-one", 9);
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]46
47 /* IOCTL tests */
48
49 ut_assertok(misc_ioctl(dev, 6, NULL));
50 /* Read back last issued ioctl */
51 ut_assertok(misc_call(dev, 2, NULL, 0, &last_ioctl,
52 sizeof(last_ioctl)));
Marek Vasut1531c4e2023-03-10 04:33:13 +0100[diff] [blame]53 ut_asserteq(6, last_ioctl);
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]54
55 ut_assertok(misc_ioctl(dev, 23, NULL));
56 /* Read back last issued ioctl */
57 ut_assertok(misc_call(dev, 2, NULL, 0, &last_ioctl,
58 sizeof(last_ioctl)));
Marek Vasut1531c4e2023-03-10 04:33:13 +0100[diff] [blame]59 ut_asserteq(23, last_ioctl);
Mario Sixa8ce0ee2018-07-31 14:24:14 +0200[diff] [blame]60
61 /* Enable / disable tests */
62
63 /* Read back enable/disable status */
64 ut_assertok(misc_call(dev, 3, NULL, 0, &enabled,
65 sizeof(enabled)));
66 ut_asserteq(true, enabled);
67
68 ut_assertok(misc_set_enabled(dev, false));
69 /* Read back enable/disable status */
70 ut_assertok(misc_call(dev, 3, NULL, 0, &enabled,
71 sizeof(enabled)));
72 ut_asserteq(false, enabled);
73
74 ut_assertok(misc_set_enabled(dev, true));
75 /* Read back enable/disable status */
76 ut_assertok(misc_call(dev, 3, NULL, 0, &enabled,
77 sizeof(enabled)));
78 ut_asserteq(true, enabled);
79
80 return 0;
81}
82
Simon Glass1a92f832024-08-22 07:57:48 -0600[diff] [blame^]83DM_TEST(dm_test_misc, UTF_SCAN_FDT);