Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 2 | /* |
Marcel Ziswiler | 97d3449 | 2018-05-09 00:18:40 +0200 | [diff] [blame] | 3 | * (C) Copyright 2014-2018 |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 4 | * Marcel Ziswiler <marcel@ziswiler.com> |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Marcel Ziswiler | 61c99fe | 2022-05-21 12:42:46 +0200 | [diff] [blame] | 8 | #include <env.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 9 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 10 | #include <log.h> |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 11 | #include <asm/arch/gp_padctrl.h> |
| 12 | #include <asm/arch/pinmux.h> |
Marcel Ziswiler | dd899d0 | 2015-08-06 00:47:00 +0200 | [diff] [blame] | 13 | #include <asm/arch-tegra/ap.h> |
| 14 | #include <asm/arch-tegra/tegra.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 15 | #include <asm/global_data.h> |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 16 | #include <asm/gpio.h> |
Marcel Ziswiler | dd899d0 | 2015-08-06 00:47:00 +0200 | [diff] [blame] | 17 | #include <asm/io.h> |
Marcel Ziswiler | 764d412 | 2015-08-06 00:47:10 +0200 | [diff] [blame] | 18 | #include <dm.h> |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 19 | #include <i2c.h> |
Marcel Ziswiler | 61c99fe | 2022-05-21 12:42:46 +0200 | [diff] [blame] | 20 | #include <fdt_support.h> |
Marcel Ziswiler | 97d3449 | 2018-05-09 00:18:40 +0200 | [diff] [blame] | 21 | #include <pci_tegra.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 22 | #include <linux/delay.h> |
Stefan Agner | 98ffd0f | 2016-11-30 13:41:53 -0800 | [diff] [blame] | 23 | #include "../common/tdx-common.h" |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 24 | |
| 25 | #include "pinmux-config-apalis_t30.h" |
| 26 | |
Marcel Ziswiler | d92dee5 | 2016-11-16 17:49:23 +0100 | [diff] [blame] | 27 | DECLARE_GLOBAL_DATA_PTR; |
| 28 | |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 29 | #define PMU_I2C_ADDRESS 0x2D |
| 30 | #define MAX_I2C_RETRY 3 |
| 31 | |
Marcel Ziswiler | 97d3449 | 2018-05-09 00:18:40 +0200 | [diff] [blame] | 32 | #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT |
| 33 | #define PEX_PERST_N TEGRA_GPIO(S, 7) /* Apalis GPIO7 */ |
| 34 | #define RESET_MOCI_CTRL TEGRA_GPIO(I, 4) |
| 35 | |
| 36 | static int pci_reset_status; |
| 37 | #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */ |
| 38 | |
Marcel Ziswiler | dd899d0 | 2015-08-06 00:47:00 +0200 | [diff] [blame] | 39 | int arch_misc_init(void) |
| 40 | { |
| 41 | if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) == |
| 42 | NVBOOTTYPE_RECOVERY) |
| 43 | printf("USB recovery mode\n"); |
| 44 | |
| 45 | return 0; |
| 46 | } |
| 47 | |
Stefan Agner | 98ffd0f | 2016-11-30 13:41:53 -0800 | [diff] [blame] | 48 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 49 | int ft_board_setup(void *blob, struct bd_info *bd) |
Stefan Agner | 98ffd0f | 2016-11-30 13:41:53 -0800 | [diff] [blame] | 50 | { |
Marcel Ziswiler | 61c99fe | 2022-05-21 12:42:46 +0200 | [diff] [blame] | 51 | u8 enetaddr[6]; |
| 52 | |
| 53 | /* MAC addr */ |
| 54 | if (eth_env_get_enetaddr("ethaddr", enetaddr)) { |
| 55 | int err = fdt_find_and_setprop(blob, |
| 56 | "/pcie@3000/pci@3,0/ethernet@0,0", |
| 57 | "local-mac-address", enetaddr, 6, 0); |
| 58 | |
| 59 | /* Older device trees might have used a different node name */ |
| 60 | if (err < 0) |
| 61 | err = fdt_find_and_setprop(blob, |
| 62 | "/pcie@3000/pci@3,0/pcie@0", |
| 63 | "local-mac-address", enetaddr, 6, 0); |
| 64 | |
| 65 | if (err >= 0) |
| 66 | puts(" MAC address updated...\n"); |
| 67 | } |
| 68 | |
Stefan Agner | 98ffd0f | 2016-11-30 13:41:53 -0800 | [diff] [blame] | 69 | return ft_common_board_setup(blob, bd); |
| 70 | } |
| 71 | #endif |
| 72 | |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 73 | /* |
| 74 | * Routine: pinmux_init |
| 75 | * Description: Do individual peripheral pinmux configs |
| 76 | */ |
| 77 | void pinmux_init(void) |
| 78 | { |
| 79 | pinmux_config_pingrp_table(tegra3_pinmux_common, |
| 80 | ARRAY_SIZE(tegra3_pinmux_common)); |
| 81 | |
| 82 | pinmux_config_pingrp_table(unused_pins_lowpower, |
| 83 | ARRAY_SIZE(unused_pins_lowpower)); |
| 84 | |
| 85 | /* Initialize any non-default pad configs (APB_MISC_GP regs) */ |
| 86 | pinmux_config_drvgrp_table(apalis_t30_padctrl, |
| 87 | ARRAY_SIZE(apalis_t30_padctrl)); |
| 88 | } |
| 89 | |
| 90 | #ifdef CONFIG_PCI_TEGRA |
| 91 | int tegra_pcie_board_init(void) |
| 92 | { |
Simon Glass | 667aee9 | 2014-12-10 08:55:57 -0700 | [diff] [blame] | 93 | struct udevice *dev; |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 94 | u8 addr, data[1]; |
| 95 | int err; |
| 96 | |
Simon Glass | a2723ae | 2015-01-25 08:26:55 -0700 | [diff] [blame] | 97 | err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 98 | if (err) { |
Simon Glass | 667aee9 | 2014-12-10 08:55:57 -0700 | [diff] [blame] | 99 | debug("%s: Cannot find PMIC I2C chip\n", __func__); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 100 | return err; |
| 101 | } |
Marcel Ziswiler | 764d412 | 2015-08-06 00:47:10 +0200 | [diff] [blame] | 102 | |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 103 | /* TPS659110: VDD2_OP_REG = 1.05V */ |
| 104 | data[0] = 0x27; |
| 105 | addr = 0x25; |
| 106 | |
Simon Glass | 7d72276 | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 107 | err = dm_i2c_write(dev, addr, data, 1); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 108 | if (err) { |
| 109 | debug("failed to set VDD supply\n"); |
| 110 | return err; |
| 111 | } |
| 112 | |
| 113 | /* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */ |
| 114 | data[0] = 0x0D; |
| 115 | addr = 0x24; |
| 116 | |
Simon Glass | 7d72276 | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 117 | err = dm_i2c_write(dev, addr, data, 1); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 118 | if (err) { |
| 119 | debug("failed to enable VDD supply\n"); |
| 120 | return err; |
| 121 | } |
| 122 | |
| 123 | /* TPS659110: LDO6_REG = 1.1V, ACTIVE */ |
| 124 | data[0] = 0x0D; |
| 125 | addr = 0x35; |
| 126 | |
Simon Glass | 7d72276 | 2015-01-12 18:02:07 -0700 | [diff] [blame] | 127 | err = dm_i2c_write(dev, addr, data, 1); |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 128 | if (err) { |
| 129 | debug("failed to set AVDD supply\n"); |
| 130 | return err; |
| 131 | } |
| 132 | |
Marcel Ziswiler | 97d3449 | 2018-05-09 00:18:40 +0200 | [diff] [blame] | 133 | #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT |
| 134 | gpio_request(PEX_PERST_N, "PEX_PERST_N"); |
| 135 | gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL"); |
| 136 | #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */ |
| 137 | |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 138 | return 0; |
| 139 | } |
Marcel Ziswiler | 97d3449 | 2018-05-09 00:18:40 +0200 | [diff] [blame] | 140 | |
| 141 | void tegra_pcie_board_port_reset(struct tegra_pcie_port *port) |
| 142 | { |
| 143 | int index = tegra_pcie_port_index_of_port(port); |
| 144 | |
| 145 | if (index == 2) { /* I210 Gigabit Ethernet Controller (On-module) */ |
| 146 | tegra_pcie_port_reset(port); |
| 147 | } |
| 148 | #ifdef CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT |
| 149 | /* |
| 150 | * Apalis PCIe aka port 1 and Apalis Type Specific 4 Lane PCIe aka port |
| 151 | * 0 share the same RESET_MOCI therefore only assert it once for both |
| 152 | * ports to avoid losing the previously brought up port again. |
| 153 | */ |
| 154 | else if ((index == 1) || (index == 0)) { |
| 155 | /* only do it once per init cycle */ |
| 156 | if (pci_reset_status % 2 == 0) { |
| 157 | /* |
| 158 | * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on |
| 159 | * Apalis Evaluation Board |
| 160 | */ |
| 161 | gpio_direction_output(PEX_PERST_N, 0); |
| 162 | gpio_direction_output(RESET_MOCI_CTRL, 0); |
| 163 | |
| 164 | /* |
| 165 | * Must be asserted for 100 ms after power and clocks |
| 166 | * are stable |
| 167 | */ |
| 168 | mdelay(100); |
| 169 | |
| 170 | gpio_set_value(PEX_PERST_N, 1); |
| 171 | /* |
| 172 | * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not |
| 173 | * Guaranteed Until 900 us After PEX_PERST# De-assertion |
| 174 | */ |
| 175 | mdelay(1); |
| 176 | gpio_set_value(RESET_MOCI_CTRL, 1); |
| 177 | } |
| 178 | pci_reset_status++; |
| 179 | } |
| 180 | #endif /* CONFIG_APALIS_T30_PCIE_EVALBOARD_INIT */ |
| 181 | } |
Marcel Ziswiler | 11e2a53 | 2014-09-05 10:18:38 +0200 | [diff] [blame] | 182 | #endif /* CONFIG_PCI_TEGRA */ |
Gerard Salvatella | 108d739 | 2018-11-19 15:54:10 +0100 | [diff] [blame] | 183 | |
| 184 | /* |
| 185 | * Backlight off before OS handover |
| 186 | */ |
| 187 | void board_preboot_os(void) |
| 188 | { |
| 189 | gpio_request(TEGRA_GPIO(V, 2), "BKL1_ON"); |
| 190 | gpio_direction_output(TEGRA_GPIO(V, 2), 0); |
| 191 | } |