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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Chander Kashyap0e7ab682011-08-18 22:37:19 +00002/*
3 * Copyright (C) 2011 Samsung Electronics
4 *
Chander Kashyap4131a772011-12-06 23:34:12 +00005 * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
Chander Kashyap0e7ab682011-08-18 22:37:19 +00006 */
7
Piotr Wilczekeb68f442014-03-07 14:59:46 +01008#ifndef __CONFIG_ORIGEN_H
9#define __CONFIG_ORIGEN_H
10
Simon Glassbe165002014-10-07 22:01:44 -060011#include <configs/exynos4-common.h>
Piotr Wilczekeb68f442014-03-07 14:59:46 +010012
Chander Kashyap0e7ab682011-08-18 22:37:19 +000013/* High Level Configuration Options */
Chander Kashyap4131a772011-12-06 23:34:12 +000014#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000015#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
16
Piotr Wilczekeb68f442014-03-07 14:59:46 +010017/* ORIGEN has 4 bank of DRAM */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000018#define CONFIG_SYS_SDRAM_BASE 0x40000000
Piotr Wilczekeb68f442014-03-07 14:59:46 +010019#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
20#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000021
Piotr Wilczekeb68f442014-03-07 14:59:46 +010022/* memtest works on */
Piotr Wilczekeb68f442014-03-07 14:59:46 +010023#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
Chander Kashyap0e7ab682011-08-18 22:37:19 +000024
Chander Kashyap0e7ab682011-08-18 22:37:19 +000025#define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
26
Chander Kashyap0e7ab682011-08-18 22:37:19 +000027/* select serial console configuration */
Rajeshwari Shindebed24422013-07-04 12:29:17 +053028
Piotr Wilczekeb68f442014-03-07 14:59:46 +010029/* Console configuration */
Piotr Wilczekeb68f442014-03-07 14:59:46 +010030#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
Chander Kashyap0e7ab682011-08-18 22:37:19 +000031
Piotr Wilczekeb68f442014-03-07 14:59:46 +010032#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000033
Piotr Wilczekeb68f442014-03-07 14:59:46 +010034#define CONFIG_SYS_MONITOR_BASE 0x00000000
Chander Kashyap0e7ab682011-08-18 22:37:19 +000035
Piotr Wilczekeb68f442014-03-07 14:59:46 +010036/* Power Down Modes */
37#define S5P_CHECK_SLEEP 0x00000BAD
38#define S5P_CHECK_DIDLE 0xBAD00000
39#define S5P_CHECK_LPA 0xABAD0000
Chander Kashyap0e7ab682011-08-18 22:37:19 +000040
Chander Kashyap488ef1a2011-08-18 22:37:20 +000041/* MMC SPL */
Chander Kashyap488ef1a2011-08-18 22:37:20 +000042#define COPY_BL2_FNPTR_ADDR 0x02020030
Inderpal Singh4a699c72013-04-04 23:09:21 +000043
Guillaume GARDET0df3a9d2014-10-08 15:04:38 +020044#define CONFIG_EXTRA_ENV_SETTINGS \
45 "loadaddr=0x40007000\0" \
46 "rdaddr=0x48000000\0" \
47 "kerneladdr=0x40007000\0" \
48 "ramdiskaddr=0x48000000\0" \
49 "console=ttySAC2,115200n8\0" \
50 "mmcdev=0\0" \
51 "bootenv=uEnv.txt\0" \
52 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
53 "importbootenv=echo Importing environment from mmc ...; " \
54 "env import -t $loadaddr $filesize\0" \
55 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
56 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
57 "source ${loadaddr}\0"
58#define CONFIG_BOOTCOMMAND \
59 "if mmc rescan; then " \
60 "echo SD/MMC found on device ${mmcdev};" \
61 "if run loadbootenv; then " \
62 "echo Loaded environment from ${bootenv};" \
63 "run importbootenv;" \
64 "fi;" \
65 "if test -n $uenvcmd; then " \
66 "echo Running uenvcmd ...;" \
67 "run uenvcmd;" \
68 "fi;" \
69 "if run loadbootscript; then " \
70 "run bootscript; " \
71 "fi; " \
72 "fi;" \
73 "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
Chander Kashyap0e7ab682011-08-18 22:37:19 +000074
Chander Kashyap0e7ab682011-08-18 22:37:19 +000075#define CONFIG_CLK_1000_400_200
76
77/* MIU (Memory Interleaving Unit) */
78#define CONFIG_MIU_2BIT_21_7_INTERLEAVED
79
Chander Kashyap0e7ab682011-08-18 22:37:19 +000080#define CONFIG_SYS_MMC_ENV_DEV 0
Chander Kashyap0e7ab682011-08-18 22:37:19 +000081#define RESERVE_BLOCK_SIZE (512)
82#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
Chander Kashyap0e7ab682011-08-18 22:37:19 +000083
Rajeshwari Shindebed24422013-07-04 12:29:17 +053084#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
85
86#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyap488ef1a2011-08-18 22:37:20 +000087
Bin Meng75574052016-02-05 19:30:11 -080088/* U-Boot copy size from boot Media to DRAM.*/
Chander Kashyap488ef1a2011-08-18 22:37:20 +000089#define COPY_BL2_SIZE 0x80000
90#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
91#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
Angus Ainslie54932fe2011-09-09 12:02:02 +000092
Chander Kashyap0e7ab682011-08-18 22:37:19 +000093#endif /* __CONFIG_H */