blob: f79f06320bfb4c24953914faa53ad6ad3b0096af [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Michael Trimarchi241f7512008-11-28 13:20:46 +01002/*-
3 * Copyright (c) 2007-2008, Juniper Networks, Inc.
michael0a326102008-12-10 17:55:19 +01004 * Copyright (c) 2008, Excito Elektronik i Skåne AB
Remy Böhmer33e87482008-12-13 22:51:58 +01005 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
6 *
Michael Trimarchi241f7512008-11-28 13:20:46 +01007 * All rights reserved.
Michael Trimarchi241f7512008-11-28 13:20:46 +01008 */
Michael Trimarchi241f7512008-11-28 13:20:46 +01009#include <common.h>
Simon Glass63334482019-11-14 12:57:39 -070010#include <cpu_func.h>
Simon Glassa194b252015-03-25 12:22:29 -060011#include <dm.h>
Patrick Georgie55fdac2013-03-06 14:08:31 +000012#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
michael0a326102008-12-10 17:55:19 +010014#include <asm/byteorder.h>
Simon Glass274e0b02020-05-10 11:39:56 -060015#include <asm/cache.h>
Lucas Stach835e11e2012-09-06 08:00:13 +020016#include <asm/unaligned.h>
Michael Trimarchi241f7512008-11-28 13:20:46 +010017#include <usb.h>
18#include <asm/io.h>
michael0a326102008-12-10 17:55:19 +010019#include <malloc.h>
Simon Glass2dd337a2015-09-02 17:24:58 -060020#include <memalign.h>
Stefan Roese86b34cf2010-11-26 15:43:28 +010021#include <watchdog.h>
Simon Glass9bc15642020-02-03 07:36:16 -070022#include <dm/device_compat.h>
Patrick Georgie55fdac2013-03-06 14:08:31 +000023#include <linux/compiler.h>
Simon Glassdbd79542020-05-10 11:40:11 -060024#include <linux/delay.h>
Jean-Christophe PLAGNIOL-VILLARD8f6bcf42009-04-03 12:46:58 +020025
26#include "ehci.h"
Michael Trimarchi241f7512008-11-28 13:20:46 +010027
Lucas Stach3494a4c2012-09-26 00:14:35 +020028#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
29#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
30#endif
Michael Trimarchi241f7512008-11-28 13:20:46 +010031
Julius Werner5c1a1ad2013-09-24 10:53:07 -070032/*
33 * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
34 * Let's time out after 8 to have a little safety margin on top of that.
35 */
36#define HCHALT_TIMEOUT (8 * 1000)
37
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +010038#if !CONFIG_IS_ENABLED(DM_USB)
Marek Vasutfd349a12013-07-10 03:16:31 +020039static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
Simon Glassa194b252015-03-25 12:22:29 -060040#endif
Tom Rini2cabcf72012-07-15 22:14:24 +000041
42#define ALIGN_END_ADDR(type, ptr, size) \
Rob Herringf14d54b2015-03-17 15:46:37 -050043 ((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
Michael Trimarchi241f7512008-11-28 13:20:46 +010044
michael0a326102008-12-10 17:55:19 +010045static struct descriptor {
46 struct usb_hub_descriptor hub;
47 struct usb_device_descriptor device;
48 struct usb_linux_config_descriptor config;
49 struct usb_linux_interface_descriptor interface;
50 struct usb_endpoint_descriptor endpoint;
51} __attribute__ ((packed)) descriptor = {
52 {
53 0x8, /* bDescLength */
54 0x29, /* bDescriptorType: hub descriptor */
55 2, /* bNrPorts -- runtime modified */
56 0, /* wHubCharacteristics */
Vincent Palatin8277b502011-12-05 14:52:22 -080057 10, /* bPwrOn2PwrGood */
michael0a326102008-12-10 17:55:19 +010058 0, /* bHubCntrCurrent */
Bin Meng0d66b3a2017-07-19 21:50:00 +080059 { /* Device removable */
60 } /* at most 7 ports! XXX */
michael0a326102008-12-10 17:55:19 +010061 },
62 {
63 0x12, /* bLength */
64 1, /* bDescriptorType: UDESC_DEVICE */
Sergei Shtylyovfa30a272010-02-27 21:29:42 +030065 cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
michael0a326102008-12-10 17:55:19 +010066 9, /* bDeviceClass: UDCLASS_HUB */
67 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
68 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
69 64, /* bMaxPacketSize: 64 bytes */
70 0x0000, /* idVendor */
71 0x0000, /* idProduct */
Sergei Shtylyovfa30a272010-02-27 21:29:42 +030072 cpu_to_le16(0x0100), /* bcdDevice */
michael0a326102008-12-10 17:55:19 +010073 1, /* iManufacturer */
74 2, /* iProduct */
75 0, /* iSerialNumber */
76 1 /* bNumConfigurations: 1 */
77 },
78 {
79 0x9,
80 2, /* bDescriptorType: UDESC_CONFIG */
81 cpu_to_le16(0x19),
82 1, /* bNumInterface */
83 1, /* bConfigurationValue */
84 0, /* iConfiguration */
85 0x40, /* bmAttributes: UC_SELF_POWER */
86 0 /* bMaxPower */
87 },
88 {
89 0x9, /* bLength */
90 4, /* bDescriptorType: UDESC_INTERFACE */
91 0, /* bInterfaceNumber */
92 0, /* bAlternateSetting */
93 1, /* bNumEndpoints */
94 9, /* bInterfaceClass: UICLASS_HUB */
95 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
96 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
97 0 /* iInterface */
98 },
99 {
100 0x7, /* bLength */
101 5, /* bDescriptorType: UDESC_ENDPOINT */
102 0x81, /* bEndpointAddress:
103 * UE_DIR_IN | EHCI_INTR_ENDPT
104 */
105 3, /* bmAttributes: UE_INTERRUPT */
Tom Rix83b9e1d2009-10-31 12:37:38 -0500106 8, /* wMaxPacketSize */
michael0a326102008-12-10 17:55:19 +0100107 255 /* bInterval */
108 },
Michael Trimarchi241f7512008-11-28 13:20:46 +0100109};
110
Remy Böhmer33e87482008-12-13 22:51:58 +0100111#if defined(CONFIG_EHCI_IS_TDI)
112#define ehci_is_TDI() (1)
113#else
114#define ehci_is_TDI() (0)
115#endif
116
Simon Glasscb7cf602015-03-25 12:22:25 -0600117static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
118{
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +0100119#if CONFIG_IS_ENABLED(DM_USB)
Hans de Goede6be39d12015-05-05 11:54:33 +0200120 return dev_get_priv(usb_get_bus(udev->dev));
Simon Glassa194b252015-03-25 12:22:29 -0600121#else
Simon Glasscb7cf602015-03-25 12:22:25 -0600122 return udev->controller;
Simon Glassa194b252015-03-25 12:22:29 -0600123#endif
Simon Glasscb7cf602015-03-25 12:22:25 -0600124}
125
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600126static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
Jim Lin54f3dfe2013-03-27 00:52:32 +0000127{
128 return PORTSC_PSPD(reg);
129}
130
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600131static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
Jim Lin54f3dfe2013-03-27 00:52:32 +0000132{
133 uint32_t tmp;
134 uint32_t *reg_ptr;
135
Simon Glass2d387ab2015-03-25 12:22:23 -0600136 reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
Jim Lin54f3dfe2013-03-27 00:52:32 +0000137 tmp = ehci_readl(reg_ptr);
138 tmp |= USBMODE_CM_HC;
139#if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
140 tmp |= USBMODE_BE;
Marek Vasutd9fa0482016-01-23 21:04:46 +0100141#else
142 tmp &= ~USBMODE_BE;
Jim Lin54f3dfe2013-03-27 00:52:32 +0000143#endif
144 ehci_writel(reg_ptr, tmp);
145}
146
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600147static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
Simon Glasscc0dc6b2015-03-25 12:22:21 -0600148 uint32_t *reg)
Marek Vasut09734772011-07-11 02:37:01 +0200149{
150 mdelay(50);
151}
152
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600153static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
Simon Glass0bec1282015-03-25 12:22:17 -0600154{
Bin Mengc6336ee2017-07-19 21:50:05 +0800155 int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
156
157 if (port < 0 || port >= max_ports) {
Simon Glass0bec1282015-03-25 12:22:17 -0600158 /* Printing the message would cause a scan failure! */
Bin Mengc6336ee2017-07-19 21:50:05 +0800159 debug("The request port(%u) exceeds maximum port number\n",
160 port);
Simon Glass0bec1282015-03-25 12:22:17 -0600161 return NULL;
162 }
163
Simon Glassdfbf1862015-03-25 12:22:24 -0600164 return (uint32_t *)&ctrl->hcor->or_portsc[port];
Simon Glass0bec1282015-03-25 12:22:17 -0600165}
166
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100167static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
michael0a326102008-12-10 17:55:19 +0100168{
michael0bf2a032008-12-11 13:43:55 +0100169 uint32_t result;
170 do {
171 result = ehci_readl(ptr);
Wolfgang Denkcdc5a7a2010-10-22 14:23:00 +0200172 udelay(5);
michael0bf2a032008-12-11 13:43:55 +0100173 if (result == ~(uint32_t)0)
174 return -1;
175 result &= mask;
176 if (result == done)
177 return 0;
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100178 usec--;
179 } while (usec > 0);
michael0bf2a032008-12-11 13:43:55 +0100180 return -1;
181}
182
Simon Glass302696b2015-03-25 12:22:28 -0600183static int ehci_reset(struct ehci_ctrl *ctrl)
michael0bf2a032008-12-11 13:43:55 +0100184{
185 uint32_t cmd;
michael0bf2a032008-12-11 13:43:55 +0100186 int ret = 0;
187
Simon Glass302696b2015-03-25 12:22:28 -0600188 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Stefan Roese745af442010-11-26 15:44:00 +0100189 cmd = (cmd & ~CMD_RUN) | CMD_RESET;
Simon Glass302696b2015-03-25 12:22:28 -0600190 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
191 ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
Lucas Stach3494a4c2012-09-26 00:14:35 +0200192 CMD_RESET, 0, 250 * 1000);
michael0bf2a032008-12-11 13:43:55 +0100193 if (ret < 0) {
194 printf("EHCI fail to reset\n");
195 goto out;
196 }
197
Jim Lin54f3dfe2013-03-27 00:52:32 +0000198 if (ehci_is_TDI())
Simon Glass302696b2015-03-25 12:22:28 -0600199 ctrl->ops.set_usb_mode(ctrl);
Simon Glass5978cdb2012-02-27 10:52:47 +0000200
201#ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
Simon Glass302696b2015-03-25 12:22:28 -0600202 cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200203 cmd &= ~TXFIFO_THRESH_MASK;
Simon Glass5978cdb2012-02-27 10:52:47 +0000204 cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
Simon Glass302696b2015-03-25 12:22:28 -0600205 ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
Simon Glass5978cdb2012-02-27 10:52:47 +0000206#endif
michael0bf2a032008-12-11 13:43:55 +0100207out:
208 return ret;
michael0a326102008-12-10 17:55:19 +0100209}
Michael Trimarchi241f7512008-11-28 13:20:46 +0100210
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700211static int ehci_shutdown(struct ehci_ctrl *ctrl)
212{
213 int i, ret = 0;
214 uint32_t cmd, reg;
Bin Mengc6336ee2017-07-19 21:50:05 +0800215 int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700216
217 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Peng Fanba397ba2016-06-15 13:15:46 +0800218 /* If not run, directly return */
219 if (!(cmd & CMD_RUN))
220 return 0;
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700221 cmd &= ~(CMD_PSE | CMD_ASE);
222 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
223 ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
224 100 * 1000);
225
226 if (!ret) {
Bin Mengc6336ee2017-07-19 21:50:05 +0800227 for (i = 0; i < max_ports; i++) {
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700228 reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
229 reg |= EHCI_PS_SUSP;
230 ehci_writel(&ctrl->hcor->or_portsc[i], reg);
231 }
232
233 cmd &= ~CMD_RUN;
234 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
235 ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
236 HCHALT_TIMEOUT);
237 }
238
239 if (ret)
240 puts("EHCI failed to shut down host controller.\n");
241
242 return ret;
243}
244
Michael Trimarchi241f7512008-11-28 13:20:46 +0100245static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
246{
Marek Vasutff24dc32012-04-09 04:07:46 +0200247 uint32_t delta, next;
Marek Vasutcadf42c2016-02-26 19:23:27 +0100248 unsigned long addr = (unsigned long)buf;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100249 int idx;
250
Ilya Yanokfb113712012-07-15 04:43:49 +0000251 if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
Marek Vasutff24dc32012-04-09 04:07:46 +0200252 debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
253
Ilya Yanokfb113712012-07-15 04:43:49 +0000254 flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
255
Michael Trimarchi241f7512008-11-28 13:20:46 +0100256 idx = 0;
Benoît Thébaudeaue68f48a2012-07-19 22:16:38 +0200257 while (idx < QT_BUFFER_CNT) {
Marek Vasutdf0b6242016-01-23 21:04:46 +0100258 td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
Wolfgang Denkebb829f2010-10-19 16:13:15 +0200259 td->qt_buffer_hi[idx] = 0;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200260 next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100261 delta = next - addr;
262 if (delta >= sz)
263 break;
264 sz -= delta;
265 addr = next;
266 idx++;
267 }
268
Benoît Thébaudeaue68f48a2012-07-19 22:16:38 +0200269 if (idx == QT_BUFFER_CNT) {
Rob Herringf14d54b2015-03-17 15:46:37 -0500270 printf("out of buffer pointers (%zu bytes left)\n", sz);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100271 return -1;
272 }
273
274 return 0;
275}
276
Ilya Yanoka1cf10f2012-11-06 13:48:20 +0000277static inline u8 ehci_encode_speed(enum usb_device_speed speed)
278{
279 #define QH_HIGH_SPEED 2
280 #define QH_FULL_SPEED 0
281 #define QH_LOW_SPEED 1
282 if (speed == USB_SPEED_HIGH)
283 return QH_HIGH_SPEED;
284 if (speed == USB_SPEED_LOW)
285 return QH_LOW_SPEED;
286 return QH_FULL_SPEED;
287}
288
Simon Glassa194b252015-03-25 12:22:29 -0600289static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
Hans de Goededa166772014-09-20 16:51:22 +0200290 struct QH *qh)
291{
Stefan Brünsa0105682015-12-22 01:21:03 +0100292 uint8_t portnr = 0;
293 uint8_t hubaddr = 0;
Hans de Goededa166772014-09-20 16:51:22 +0200294
Simon Glassa194b252015-03-25 12:22:29 -0600295 if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
Hans de Goededa166772014-09-20 16:51:22 +0200296 return;
297
Stefan Brünsa0105682015-12-22 01:21:03 +0100298 usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
Hans de Goededa166772014-09-20 16:51:22 +0200299
Stefan Brünsa0105682015-12-22 01:21:03 +0100300 qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
301 QH_ENDPT2_HUBADDR(hubaddr));
Hans de Goededa166772014-09-20 16:51:22 +0200302}
303
Marek Vasut118a9032020-04-06 14:29:44 +0200304static int ehci_enable_async(struct ehci_ctrl *ctrl)
305{
306 u32 cmd;
307 int ret;
308
309 /* Enable async. schedule. */
310 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
311 if (cmd & CMD_ASE)
312 return 0;
313
314 cmd |= CMD_ASE;
315 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
316
317 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
318 100 * 1000);
319 if (ret < 0)
320 printf("EHCI fail timeout STS_ASS set\n");
321
322 return ret;
323}
324
325static int ehci_disable_async(struct ehci_ctrl *ctrl)
326{
327 u32 cmd;
328 int ret;
329
330 if (ctrl->async_locked)
331 return 0;
332
333 /* Disable async schedule. */
334 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
335 if (!(cmd & CMD_ASE))
336 return 0;
337
338 cmd &= ~CMD_ASE;
339 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
340
341 ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
342 100 * 1000);
343 if (ret < 0)
344 printf("EHCI fail timeout STS_ASS reset\n");
345
346 return ret;
347}
348
Michael Trimarchi241f7512008-11-28 13:20:46 +0100349static int
350ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
351 int length, struct devrequest *req)
352{
Tom Rini2cabcf72012-07-15 22:14:24 +0000353 ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200354 struct qTD *qtd;
355 int qtd_count = 0;
Marek Vasut4f668312012-04-08 23:32:05 +0200356 int qtd_counter = 0;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100357 volatile struct qTD *vtd;
358 unsigned long ts;
359 uint32_t *tdp;
Marek Vasut569c2a52019-10-06 16:13:38 +0200360 uint32_t endpt, maxpacket, token, usbsts, qhtoken;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100361 uint32_t c, toggle;
Simon Glassfd7f5132011-02-07 14:42:16 -0800362 int timeout;
Michael Trimarchi6d4b91c2008-12-31 10:33:22 +0100363 int ret = 0;
Simon Glasscb7cf602015-03-25 12:22:25 -0600364 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100365
michael0a326102008-12-10 17:55:19 +0100366 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
Michael Trimarchi241f7512008-11-28 13:20:46 +0100367 buffer, length, req);
368 if (req != NULL)
michael0a326102008-12-10 17:55:19 +0100369 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
Michael Trimarchi241f7512008-11-28 13:20:46 +0100370 req->request, req->request,
371 req->requesttype, req->requesttype,
372 le16_to_cpu(req->value), le16_to_cpu(req->value),
michael0a326102008-12-10 17:55:19 +0100373 le16_to_cpu(req->index));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100374
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200375#define PKT_ALIGN 512
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200376 /*
377 * The USB transfer is split into qTD transfers. Eeach qTD transfer is
378 * described by a transfer descriptor (the qTD). The qTDs form a linked
379 * list with a queue head (QH).
380 *
381 * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
382 * have its beginning in a qTD transfer and its end in the following
383 * one, so the qTD transfer lengths have to be chosen accordingly.
384 *
385 * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
386 * single pages. The first data buffer can start at any offset within a
387 * page (not considering the cache-line alignment issues), while the
388 * following buffers must be page-aligned. There is no alignment
389 * constraint on the size of a qTD transfer.
390 */
391 if (req != NULL)
392 /* 1 qTD will be needed for SETUP, and 1 for ACK. */
393 qtd_count += 1 + 1;
394 if (length > 0 || req == NULL) {
395 /*
396 * Determine the qTD transfer size that will be used for the
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200397 * data payload (not considering the first qTD transfer, which
398 * may be longer or shorter, and the final one, which may be
399 * shorter).
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200400 *
401 * In order to keep each packet within a qTD transfer, the qTD
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200402 * transfer size is aligned to PKT_ALIGN, which is a multiple of
403 * wMaxPacketSize (except in some cases for interrupt transfers,
404 * see comment in submit_int_msg()).
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200405 *
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200406 * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200407 * QT_BUFFER_CNT full pages will be used.
408 */
409 int xfr_sz = QT_BUFFER_CNT;
410 /*
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200411 * However, if the input buffer is not aligned to PKT_ALIGN, the
412 * qTD transfer size will be one page shorter, and the first qTD
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200413 * data buffer of each transfer will be page-unaligned.
414 */
Rob Herringf14d54b2015-03-17 15:46:37 -0500415 if ((unsigned long)buffer & (PKT_ALIGN - 1))
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200416 xfr_sz--;
417 /* Convert the qTD transfer size to bytes. */
418 xfr_sz *= EHCI_PAGE_SIZE;
419 /*
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200420 * Approximate by excess the number of qTDs that will be
421 * required for the data payload. The exact formula is way more
422 * complicated and saves at most 2 qTDs, i.e. a total of 128
423 * bytes.
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200424 */
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200425 qtd_count += 2 + length / xfr_sz;
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200426 }
427/*
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200428 * Threshold value based on the worst-case total size of the allocated qTDs for
429 * a mass-storage transfer of 65535 blocks of 512 bytes.
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200430 */
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200431#if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200432#warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
433#endif
434 qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
435 if (qtd == NULL) {
436 printf("unable to allocate TDs\n");
437 return -1;
438 }
439
Tom Rini2cabcf72012-07-15 22:14:24 +0000440 memset(qh, 0, sizeof(struct QH));
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200441 memset(qtd, 0, qtd_count * sizeof(*qtd));
Marek Vasut4f668312012-04-08 23:32:05 +0200442
Marek Vasutff24dc32012-04-09 04:07:46 +0200443 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
444
Marek Vasut285c8b32012-04-09 04:13:00 +0200445 /*
446 * Setup QH (3.6 in ehci-r10.pdf)
447 *
448 * qh_link ................. 03-00 H
449 * qh_endpt1 ............... 07-04 H
450 * qh_endpt2 ............... 0B-08 H
451 * - qh_curtd
452 * qh_overlay.qt_next ...... 13-10 H
453 * - qh_overlay.qt_altnext
454 */
Marek Vasutdf0b6242016-01-23 21:04:46 +0100455 qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
Ilya Yanoka1cf10f2012-11-06 13:48:20 +0000456 c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200457 maxpacket = usb_maxpacket(dev, pipe);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200458 endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200459 QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200460 QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200461 QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
462 QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
Chris Packham434f0582018-10-04 20:03:53 +1300463
464 /* Force FS for fsl HS quirk */
465 if (!ctrl->has_fsl_erratum_a005275)
466 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(dev->speed));
467 else
468 endpt |= QH_ENDPT1_EPS(ehci_encode_speed(QH_FULL_SPEED));
469
Tom Rini2cabcf72012-07-15 22:14:24 +0000470 qh->qh_endpt1 = cpu_to_hc32(endpt);
Hans de Goededa166772014-09-20 16:51:22 +0200471 endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
Tom Rini2cabcf72012-07-15 22:14:24 +0000472 qh->qh_endpt2 = cpu_to_hc32(endpt);
Hans de Goededa166772014-09-20 16:51:22 +0200473 ehci_update_endpt2_dev_n_port(dev, qh);
Tom Rini2cabcf72012-07-15 22:14:24 +0000474 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
Stephen Warren1907e5a2014-02-07 09:53:50 -0700475 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100476
Tom Rini2cabcf72012-07-15 22:14:24 +0000477 tdp = &qh->qh_overlay.qt_next;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100478 if (req != NULL) {
Marek Vasut285c8b32012-04-09 04:13:00 +0200479 /*
480 * Setup request qTD (3.5 in ehci-r10.pdf)
481 *
482 * qt_next ................ 03-00 H
483 * qt_altnext ............. 07-04 H
484 * qt_token ............... 0B-08 H
485 *
486 * [ buffer, buffer_hi ] loaded with "req".
487 */
Marek Vasut4f668312012-04-08 23:32:05 +0200488 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
489 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200490 token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
491 QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
492 QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
493 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
Marek Vasut4f668312012-04-08 23:32:05 +0200494 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200495 if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
496 printf("unable to construct SETUP TD\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100497 goto fail;
498 }
Marek Vasut285c8b32012-04-09 04:13:00 +0200499 /* Update previous qTD! */
Marek Vasutdf0b6242016-01-23 21:04:46 +0100500 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
Marek Vasut4f668312012-04-08 23:32:05 +0200501 tdp = &qtd[qtd_counter++].qt_next;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100502 toggle = 1;
503 }
504
505 if (length > 0 || req == NULL) {
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200506 uint8_t *buf_ptr = buffer;
507 int left_length = length;
508
509 do {
510 /*
511 * Determine the size of this qTD transfer. By default,
512 * QT_BUFFER_CNT full pages can be used.
513 */
514 int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
515 /*
516 * However, if the input buffer is not page-aligned, the
517 * portion of the first page before the buffer start
518 * offset within that page is unusable.
519 */
Rob Herringf14d54b2015-03-17 15:46:37 -0500520 xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200521 /*
522 * In order to keep each packet within a qTD transfer,
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200523 * align the qTD transfer size to PKT_ALIGN.
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200524 */
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200525 xfr_bytes &= ~(PKT_ALIGN - 1);
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200526 /*
527 * This transfer may be shorter than the available qTD
528 * transfer size that has just been computed.
529 */
530 xfr_bytes = min(xfr_bytes, left_length);
531
532 /*
533 * Setup request qTD (3.5 in ehci-r10.pdf)
534 *
535 * qt_next ................ 03-00 H
536 * qt_altnext ............. 07-04 H
537 * qt_token ............... 0B-08 H
538 *
539 * [ buffer, buffer_hi ] loaded with "buffer".
540 */
541 qtd[qtd_counter].qt_next =
542 cpu_to_hc32(QT_NEXT_TERMINATE);
543 qtd[qtd_counter].qt_altnext =
544 cpu_to_hc32(QT_NEXT_TERMINATE);
545 token = QT_TOKEN_DT(toggle) |
546 QT_TOKEN_TOTALBYTES(xfr_bytes) |
547 QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
548 QT_TOKEN_CERR(3) |
549 QT_TOKEN_PID(usb_pipein(pipe) ?
550 QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
551 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
552 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
553 if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
554 xfr_bytes)) {
555 printf("unable to construct DATA TD\n");
556 goto fail;
557 }
558 /* Update previous qTD! */
Marek Vasutdf0b6242016-01-23 21:04:46 +0100559 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200560 tdp = &qtd[qtd_counter++].qt_next;
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200561 /*
562 * Data toggle has to be adjusted since the qTD transfer
563 * size is not always an even multiple of
564 * wMaxPacketSize.
565 */
566 if ((xfr_bytes / maxpacket) & 1)
567 toggle ^= 1;
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200568 buf_ptr += xfr_bytes;
569 left_length -= xfr_bytes;
570 } while (left_length > 0);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100571 }
572
573 if (req != NULL) {
Marek Vasut285c8b32012-04-09 04:13:00 +0200574 /*
575 * Setup request qTD (3.5 in ehci-r10.pdf)
576 *
577 * qt_next ................ 03-00 H
578 * qt_altnext ............. 07-04 H
579 * qt_token ............... 0B-08 H
580 */
Marek Vasut4f668312012-04-08 23:32:05 +0200581 qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
582 qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau4e23df12012-08-10 18:27:23 +0200583 token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200584 QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
585 QT_TOKEN_PID(usb_pipein(pipe) ?
586 QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
587 QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
Marek Vasut4f668312012-04-08 23:32:05 +0200588 qtd[qtd_counter].qt_token = cpu_to_hc32(token);
Marek Vasut285c8b32012-04-09 04:13:00 +0200589 /* Update previous qTD! */
Marek Vasutdf0b6242016-01-23 21:04:46 +0100590 *tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
Marek Vasut4f668312012-04-08 23:32:05 +0200591 tdp = &qtd[qtd_counter++].qt_next;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100592 }
593
Marek Vasutdf0b6242016-01-23 21:04:46 +0100594 ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100595
Stefan Roese25983c12009-01-21 17:12:19 +0100596 /* Flush dcache */
Rob Herringf14d54b2015-03-17 15:46:37 -0500597 flush_dcache_range((unsigned long)&ctrl->qh_list,
Lucas Stach3494a4c2012-09-26 00:14:35 +0200598 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -0500599 flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
600 flush_dcache_range((unsigned long)qtd,
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200601 ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
Stefan Roese25983c12009-01-21 17:12:19 +0100602
Lucas Stach3494a4c2012-09-26 00:14:35 +0200603 usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
604 ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100605
Marek Vasut118a9032020-04-06 14:29:44 +0200606 ret = ehci_enable_async(ctrl);
607 if (ret)
608 goto fail;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100609
610 /* Wait for TDs to be processed. */
611 ts = get_timer(0);
Marek Vasut4f668312012-04-08 23:32:05 +0200612 vtd = &qtd[qtd_counter - 1];
Simon Glassfd7f5132011-02-07 14:42:16 -0800613 timeout = USB_TIMEOUT_MS(pipe);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100614 do {
Stefan Roese25983c12009-01-21 17:12:19 +0100615 /* Invalidate dcache */
Rob Herringf14d54b2015-03-17 15:46:37 -0500616 invalidate_dcache_range((unsigned long)&ctrl->qh_list,
Lucas Stach3494a4c2012-09-26 00:14:35 +0200617 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -0500618 invalidate_dcache_range((unsigned long)qh,
Tom Rini2cabcf72012-07-15 22:14:24 +0000619 ALIGN_END_ADDR(struct QH, qh, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -0500620 invalidate_dcache_range((unsigned long)qtd,
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200621 ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
Marek Vasutff24dc32012-04-09 04:07:46 +0200622
michael0a326102008-12-10 17:55:19 +0100623 token = hc32_to_cpu(vtd->qt_token);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200624 if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
Michael Trimarchi241f7512008-11-28 13:20:46 +0100625 break;
Stefan Roese86b34cf2010-11-26 15:43:28 +0100626 WATCHDOG_RESET();
Simon Glassfd7f5132011-02-07 14:42:16 -0800627 } while (get_timer(ts) < timeout);
Marek Vasut569c2a52019-10-06 16:13:38 +0200628 qhtoken = hc32_to_cpu(qh->qh_overlay.qt_token);
629
630 ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
631 flush_dcache_range((unsigned long)&ctrl->qh_list,
632 ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
Simon Glassfd7f5132011-02-07 14:42:16 -0800633
Ilya Yanokfb113712012-07-15 04:43:49 +0000634 /*
635 * Invalidate the memory area occupied by buffer
636 * Don't try to fix the buffer alignment, if it isn't properly
637 * aligned it's upper layer's fault so let invalidate_dcache_range()
638 * vow about it. But we have to fix the length as it's actual
639 * transfer length and can be unaligned. This is potentially
640 * dangerous operation, it's responsibility of the calling
641 * code to make sure enough space is reserved.
642 */
Dirk Behme78c73562017-11-17 15:28:36 +0100643 if (buffer != NULL && length > 0)
644 invalidate_dcache_range((unsigned long)buffer,
645 ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
Marek Vasutff24dc32012-04-09 04:07:46 +0200646
Simon Glassfd7f5132011-02-07 14:42:16 -0800647 /* Check that the TD processing happened */
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200648 if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
Simon Glassfd7f5132011-02-07 14:42:16 -0800649 printf("EHCI timed out on TD - token=%#x\n", token);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100650
Marek Vasut118a9032020-04-06 14:29:44 +0200651 ret = ehci_disable_async(ctrl);
652 if (ret)
653 goto fail;
654
Marek Vasut569c2a52019-10-06 16:13:38 +0200655 if (!(QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_ACTIVE)) {
656 debug("TOKEN=%#x\n", qhtoken);
657 switch (QT_TOKEN_GET_STATUS(qhtoken) &
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200658 ~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
Michael Trimarchi241f7512008-11-28 13:20:46 +0100659 case 0:
Marek Vasut569c2a52019-10-06 16:13:38 +0200660 toggle = QT_TOKEN_GET_DT(qhtoken);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100661 usb_settoggle(dev, usb_pipeendpoint(pipe),
662 usb_pipeout(pipe), toggle);
663 dev->status = 0;
664 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200665 case QT_TOKEN_STATUS_HALTED:
Michael Trimarchi241f7512008-11-28 13:20:46 +0100666 dev->status = USB_ST_STALLED;
667 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200668 case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
669 case QT_TOKEN_STATUS_DATBUFERR:
Michael Trimarchi241f7512008-11-28 13:20:46 +0100670 dev->status = USB_ST_BUF_ERR;
671 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200672 case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
673 case QT_TOKEN_STATUS_BABBLEDET:
Michael Trimarchi241f7512008-11-28 13:20:46 +0100674 dev->status = USB_ST_BABBLE_DET;
675 break;
676 default:
677 dev->status = USB_ST_CRC_ERR;
Marek Vasut569c2a52019-10-06 16:13:38 +0200678 if (QT_TOKEN_GET_STATUS(qhtoken) & QT_TOKEN_STATUS_HALTED)
Anatolij Gustschine1e09312010-11-02 11:47:29 +0100679 dev->status |= USB_ST_STALLED;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100680 break;
681 }
Marek Vasut569c2a52019-10-06 16:13:38 +0200682 dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(qhtoken);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100683 } else {
684 dev->act_len = 0;
Kuo-Jung Sub5d59de2013-05-15 15:29:23 +0800685#ifndef CONFIG_USB_EHCI_FARADAY
michael0a326102008-12-10 17:55:19 +0100686 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
Lucas Stach3494a4c2012-09-26 00:14:35 +0200687 dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
688 ehci_readl(&ctrl->hcor->or_portsc[0]),
689 ehci_readl(&ctrl->hcor->or_portsc[1]));
Kuo-Jung Sub5d59de2013-05-15 15:29:23 +0800690#endif
Michael Trimarchi241f7512008-11-28 13:20:46 +0100691 }
692
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200693 free(qtd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100694 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
695
696fail:
Benoît Thébaudeaub39f8b52012-08-10 18:22:32 +0200697 free(qtd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100698 return -1;
699}
700
Simon Glasscb7cf602015-03-25 12:22:25 -0600701static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
702 void *buffer, int length, struct devrequest *req)
Michael Trimarchi241f7512008-11-28 13:20:46 +0100703{
704 uint8_t tmpbuf[4];
705 u16 typeReq;
michael0a326102008-12-10 17:55:19 +0100706 void *srcptr = NULL;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100707 int len, srclen;
708 uint32_t reg;
Remy Böhmer33e87482008-12-13 22:51:58 +0100709 uint32_t *status_reg;
Julius Wernerd4046702013-02-28 18:08:40 +0000710 int port = le16_to_cpu(req->index) & 0xff;
Simon Glasscb7cf602015-03-25 12:22:25 -0600711 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100712
713 srclen = 0;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100714
michael0a326102008-12-10 17:55:19 +0100715 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
Michael Trimarchi241f7512008-11-28 13:20:46 +0100716 req->request, req->request,
717 req->requesttype, req->requesttype,
718 le16_to_cpu(req->value), le16_to_cpu(req->index));
719
Prafulla Wadaskar22810292009-07-17 19:56:30 +0530720 typeReq = req->request | req->requesttype << 8;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100721
Prafulla Wadaskar22810292009-07-17 19:56:30 +0530722 switch (typeReq) {
Kuo-Jung Su9930e9f2013-05-15 15:29:20 +0800723 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
724 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
725 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600726 status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
Kuo-Jung Su6a656df2013-05-15 15:29:21 +0800727 if (!status_reg)
Kuo-Jung Su9930e9f2013-05-15 15:29:20 +0800728 return -1;
Kuo-Jung Su9930e9f2013-05-15 15:29:20 +0800729 break;
730 default:
731 status_reg = NULL;
732 break;
733 }
734
735 switch (typeReq) {
Michael Trimarchi241f7512008-11-28 13:20:46 +0100736 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
737 switch (le16_to_cpu(req->value) >> 8) {
738 case USB_DT_DEVICE:
michael0a326102008-12-10 17:55:19 +0100739 debug("USB_DT_DEVICE request\n");
740 srcptr = &descriptor.device;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200741 srclen = descriptor.device.bLength;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100742 break;
743 case USB_DT_CONFIG:
michael0a326102008-12-10 17:55:19 +0100744 debug("USB_DT_CONFIG config\n");
745 srcptr = &descriptor.config;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200746 srclen = descriptor.config.bLength +
747 descriptor.interface.bLength +
748 descriptor.endpoint.bLength;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100749 break;
750 case USB_DT_STRING:
michael0a326102008-12-10 17:55:19 +0100751 debug("USB_DT_STRING config\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100752 switch (le16_to_cpu(req->value) & 0xff) {
753 case 0: /* Language */
754 srcptr = "\4\3\1\0";
755 srclen = 4;
756 break;
757 case 1: /* Vendor */
758 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
759 srclen = 14;
760 break;
761 case 2: /* Product */
762 srcptr = "\52\3E\0H\0C\0I\0 "
763 "\0H\0o\0s\0t\0 "
764 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
765 srclen = 42;
766 break;
767 default:
michael0a326102008-12-10 17:55:19 +0100768 debug("unknown value DT_STRING %x\n",
769 le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100770 goto unknown;
771 }
772 break;
773 default:
michael0a326102008-12-10 17:55:19 +0100774 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100775 goto unknown;
776 }
777 break;
778 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
779 switch (le16_to_cpu(req->value) >> 8) {
780 case USB_DT_HUB:
michael0a326102008-12-10 17:55:19 +0100781 debug("USB_DT_HUB config\n");
782 srcptr = &descriptor.hub;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200783 srclen = descriptor.hub.bLength;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100784 break;
785 default:
michael0a326102008-12-10 17:55:19 +0100786 debug("unknown value %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100787 goto unknown;
788 }
789 break;
790 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
michael0a326102008-12-10 17:55:19 +0100791 debug("USB_REQ_SET_ADDRESS\n");
Lucas Stach3494a4c2012-09-26 00:14:35 +0200792 ctrl->rootdev = le16_to_cpu(req->value);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100793 break;
794 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
michael0a326102008-12-10 17:55:19 +0100795 debug("USB_REQ_SET_CONFIGURATION\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100796 /* Nothing to do */
797 break;
798 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
799 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
800 tmpbuf[1] = 0;
801 srcptr = tmpbuf;
802 srclen = 2;
803 break;
michael0a326102008-12-10 17:55:19 +0100804 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
Michael Trimarchi241f7512008-11-28 13:20:46 +0100805 memset(tmpbuf, 0, 4);
Remy Böhmer33e87482008-12-13 22:51:58 +0100806 reg = ehci_readl(status_reg);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100807 if (reg & EHCI_PS_CS)
808 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
809 if (reg & EHCI_PS_PE)
810 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
811 if (reg & EHCI_PS_SUSP)
812 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
813 if (reg & EHCI_PS_OCA)
814 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300815 if (reg & EHCI_PS_PR)
816 tmpbuf[0] |= USB_PORT_STAT_RESET;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100817 if (reg & EHCI_PS_PP)
818 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
Stefan Roese497f1842009-01-21 17:12:01 +0100819
820 if (ehci_is_TDI()) {
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600821 switch (ctrl->ops.get_port_speed(ctrl, reg)) {
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200822 case PORTSC_PSPD_FS:
Stefan Roese497f1842009-01-21 17:12:01 +0100823 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200824 case PORTSC_PSPD_LS:
Stefan Roese497f1842009-01-21 17:12:01 +0100825 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
826 break;
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +0200827 case PORTSC_PSPD_HS:
Stefan Roese497f1842009-01-21 17:12:01 +0100828 default:
829 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
830 break;
831 }
832 } else {
833 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
834 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100835
836 if (reg & EHCI_PS_CSC)
837 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
838 if (reg & EHCI_PS_PEC)
839 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
840 if (reg & EHCI_PS_OCC)
841 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
Julius Wernerd4046702013-02-28 18:08:40 +0000842 if (ctrl->portreset & (1 << port))
Michael Trimarchi241f7512008-11-28 13:20:46 +0100843 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
Remy Böhmer33e87482008-12-13 22:51:58 +0100844
Michael Trimarchi241f7512008-11-28 13:20:46 +0100845 srcptr = tmpbuf;
846 srclen = 4;
847 break;
michael0a326102008-12-10 17:55:19 +0100848 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmer33e87482008-12-13 22:51:58 +0100849 reg = ehci_readl(status_reg);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100850 reg &= ~EHCI_PS_CLEAR;
851 switch (le16_to_cpu(req->value)) {
michael0bf2a032008-12-11 13:43:55 +0100852 case USB_PORT_FEAT_ENABLE:
853 reg |= EHCI_PS_PE;
Remy Böhmer33e87482008-12-13 22:51:58 +0100854 ehci_writel(status_reg, reg);
michael0bf2a032008-12-11 13:43:55 +0100855 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100856 case USB_PORT_FEAT_POWER:
Lucas Stach3494a4c2012-09-26 00:14:35 +0200857 if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
Remy Böhmer33e87482008-12-13 22:51:58 +0100858 reg |= EHCI_PS_PP;
859 ehci_writel(status_reg, reg);
860 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100861 break;
862 case USB_PORT_FEAT_RESET:
Remy Böhmer33e87482008-12-13 22:51:58 +0100863 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
864 !ehci_is_TDI() &&
865 EHCI_PS_IS_LOWSPEED(reg)) {
Michael Trimarchi241f7512008-11-28 13:20:46 +0100866 /* Low speed device, give up ownership. */
Remy Böhmer33e87482008-12-13 22:51:58 +0100867 debug("port %d low speed --> companion\n",
Julius Wernerd4046702013-02-28 18:08:40 +0000868 port - 1);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100869 reg |= EHCI_PS_PO;
Remy Böhmer33e87482008-12-13 22:51:58 +0100870 ehci_writel(status_reg, reg);
Hans de Goede63f34ca2015-05-10 14:10:16 +0200871 return -ENXIO;
Remy Böhmer33e87482008-12-13 22:51:58 +0100872 } else {
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300873 int ret;
874
Chris Packham434f0582018-10-04 20:03:53 +1300875 /* Disable chirp for HS erratum */
876 if (ctrl->has_fsl_erratum_a005275)
877 reg |= PORTSC_FSL_PFSC;
878
Remy Böhmer33e87482008-12-13 22:51:58 +0100879 reg |= EHCI_PS_PR;
880 reg &= ~EHCI_PS_PE;
881 ehci_writel(status_reg, reg);
882 /*
883 * caller must wait, then call GetPortStatus
884 * usb 2.0 specification say 50 ms resets on
885 * root
886 */
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600887 ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
Marek Vasut09734772011-07-11 02:37:01 +0200888
Chris Zhangfddf6d62010-01-06 13:34:04 -0800889 ehci_writel(status_reg, reg & ~EHCI_PS_PR);
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300890 /*
891 * A host controller must terminate the reset
892 * and stabilize the state of the port within
893 * 2 milliseconds
894 */
895 ret = handshake(status_reg, EHCI_PS_PR, 0,
896 2 * 1000);
Hans de Goedeb5b3ef22015-05-10 14:10:13 +0200897 if (!ret) {
898 reg = ehci_readl(status_reg);
899 if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
900 == EHCI_PS_CS && !ehci_is_TDI()) {
901 debug("port %d full speed --> companion\n", port - 1);
902 reg &= ~EHCI_PS_CLEAR;
903 reg |= EHCI_PS_PO;
904 ehci_writel(status_reg, reg);
Hans de Goede63f34ca2015-05-10 14:10:16 +0200905 return -ENXIO;
Hans de Goedeb5b3ef22015-05-10 14:10:13 +0200906 } else {
907 ctrl->portreset |= 1 << port;
908 }
909 } else {
Sergei Shtylyov23dec682010-02-27 21:33:21 +0300910 printf("port(%d) reset error\n",
Julius Wernerd4046702013-02-28 18:08:40 +0000911 port - 1);
Hans de Goedeb5b3ef22015-05-10 14:10:13 +0200912 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100913 }
Michael Trimarchi241f7512008-11-28 13:20:46 +0100914 break;
Julius Wernerd4046702013-02-28 18:08:40 +0000915 case USB_PORT_FEAT_TEST:
Julius Werner5c1a1ad2013-09-24 10:53:07 -0700916 ehci_shutdown(ctrl);
Julius Wernerd4046702013-02-28 18:08:40 +0000917 reg &= ~(0xf << 16);
918 reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
919 ehci_writel(status_reg, reg);
920 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100921 default:
michael0a326102008-12-10 17:55:19 +0100922 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100923 goto unknown;
924 }
Remy Böhmer33e87482008-12-13 22:51:58 +0100925 /* unblock posted writes */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200926 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100927 break;
michael0a326102008-12-10 17:55:19 +0100928 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
Remy Böhmer33e87482008-12-13 22:51:58 +0100929 reg = ehci_readl(status_reg);
Simon Glass0554ba52013-05-10 19:49:00 -0700930 reg &= ~EHCI_PS_CLEAR;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100931 switch (le16_to_cpu(req->value)) {
932 case USB_PORT_FEAT_ENABLE:
933 reg &= ~EHCI_PS_PE;
934 break;
Remy Böhmer33e87482008-12-13 22:51:58 +0100935 case USB_PORT_FEAT_C_ENABLE:
Simon Glass0554ba52013-05-10 19:49:00 -0700936 reg |= EHCI_PS_PE;
Remy Böhmer33e87482008-12-13 22:51:58 +0100937 break;
938 case USB_PORT_FEAT_POWER:
Lucas Stach3494a4c2012-09-26 00:14:35 +0200939 if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
Simon Glass0554ba52013-05-10 19:49:00 -0700940 reg &= ~EHCI_PS_PP;
941 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100942 case USB_PORT_FEAT_C_CONNECTION:
Simon Glass0554ba52013-05-10 19:49:00 -0700943 reg |= EHCI_PS_CSC;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100944 break;
michael0bf2a032008-12-11 13:43:55 +0100945 case USB_PORT_FEAT_OVER_CURRENT:
Simon Glass0554ba52013-05-10 19:49:00 -0700946 reg |= EHCI_PS_OCC;
michael0bf2a032008-12-11 13:43:55 +0100947 break;
Michael Trimarchi241f7512008-11-28 13:20:46 +0100948 case USB_PORT_FEAT_C_RESET:
Julius Wernerd4046702013-02-28 18:08:40 +0000949 ctrl->portreset &= ~(1 << port);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100950 break;
951 default:
michael0a326102008-12-10 17:55:19 +0100952 debug("unknown feature %x\n", le16_to_cpu(req->value));
Michael Trimarchi241f7512008-11-28 13:20:46 +0100953 goto unknown;
954 }
Remy Böhmer33e87482008-12-13 22:51:58 +0100955 ehci_writel(status_reg, reg);
956 /* unblock posted write */
Lucas Stach3494a4c2012-09-26 00:14:35 +0200957 (void) ehci_readl(&ctrl->hcor->or_usbcmd);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100958 break;
959 default:
michael0a326102008-12-10 17:55:19 +0100960 debug("Unknown request\n");
Michael Trimarchi241f7512008-11-28 13:20:46 +0100961 goto unknown;
962 }
963
Mike Frysinger60ce19a2012-03-05 13:47:00 +0000964 mdelay(1);
Masahiro Yamadadb204642014-11-07 03:03:31 +0900965 len = min3(srclen, (int)le16_to_cpu(req->length), length);
Michael Trimarchi241f7512008-11-28 13:20:46 +0100966 if (srcptr != NULL && len > 0)
967 memcpy(buffer, srcptr, len);
michael0a326102008-12-10 17:55:19 +0100968 else
969 debug("Len is 0\n");
970
Michael Trimarchi241f7512008-11-28 13:20:46 +0100971 dev->act_len = len;
972 dev->status = 0;
973 return 0;
974
975unknown:
michael0a326102008-12-10 17:55:19 +0100976 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
Michael Trimarchi241f7512008-11-28 13:20:46 +0100977 req->requesttype, req->request, le16_to_cpu(req->value),
978 le16_to_cpu(req->index), le16_to_cpu(req->length));
979
980 dev->act_len = 0;
981 dev->status = USB_ST_STALLED;
982 return -1;
983}
984
Masahiro Yamada6d8e4332017-06-22 16:35:14 +0900985static const struct ehci_ops default_ehci_ops = {
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600986 .set_usb_mode = ehci_set_usbmode,
987 .get_port_speed = ehci_get_port_speed,
988 .powerup_fixup = ehci_powerup_fixup,
989 .get_portsc_register = ehci_get_portsc_register,
990};
991
992static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
Simon Glass0851caa2015-03-25 12:22:19 -0600993{
Simon Glassdc9f3ed2015-03-25 12:22:27 -0600994 if (!ops) {
995 ctrl->ops = default_ehci_ops;
996 } else {
997 ctrl->ops = *ops;
998 if (!ctrl->ops.set_usb_mode)
999 ctrl->ops.set_usb_mode = ehci_set_usbmode;
1000 if (!ctrl->ops.get_port_speed)
1001 ctrl->ops.get_port_speed = ehci_get_port_speed;
1002 if (!ctrl->ops.powerup_fixup)
1003 ctrl->ops.powerup_fixup = ehci_powerup_fixup;
1004 if (!ctrl->ops.get_portsc_register)
1005 ctrl->ops.get_portsc_register =
1006 ehci_get_portsc_register;
1007 }
Simon Glass0851caa2015-03-25 12:22:19 -06001008}
1009
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +01001010#if !CONFIG_IS_ENABLED(DM_USB)
Simon Glassdc9f3ed2015-03-25 12:22:27 -06001011void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
1012{
1013 struct ehci_ctrl *ctrl = &ehcic[index];
1014
1015 ctrl->priv = priv;
1016 ehci_setup_ops(ctrl, ops);
1017}
1018
Simon Glass0851caa2015-03-25 12:22:19 -06001019void *ehci_get_controller_priv(int index)
1020{
1021 return ehcic[index].priv;
1022}
Simon Glassa194b252015-03-25 12:22:29 -06001023#endif
Simon Glass0851caa2015-03-25 12:22:19 -06001024
Simon Glassccc40fd2015-03-25 12:22:26 -06001025static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001026{
Lucas Stach3494a4c2012-09-26 00:14:35 +02001027 struct QH *qh_list;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001028 struct QH *periodic;
Simon Glassccc40fd2015-03-25 12:22:26 -06001029 uint32_t reg;
1030 uint32_t cmd;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001031 int i;
michael0bf2a032008-12-11 13:43:55 +01001032
Vincent Palatin0d6f77c2012-12-12 17:55:22 -08001033 /* Set the high address word (aka segment) for 64-bit controller */
Simon Glassccc40fd2015-03-25 12:22:26 -06001034 if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
1035 ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
Stefan Roese2e98fc72009-01-21 17:12:10 +01001036
Simon Glassccc40fd2015-03-25 12:22:26 -06001037 qh_list = &ctrl->qh_list;
Lucas Stach3494a4c2012-09-26 00:14:35 +02001038
Michael Trimarchi241f7512008-11-28 13:20:46 +01001039 /* Set head of reclaim list */
Tom Rini2cabcf72012-07-15 22:14:24 +00001040 memset(qh_list, 0, sizeof(*qh_list));
Marek Vasutdf0b6242016-01-23 21:04:46 +01001041 qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +02001042 qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
1043 QH_ENDPT1_EPS(USB_SPEED_HIGH));
Tom Rini2cabcf72012-07-15 22:14:24 +00001044 qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1045 qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Benoît Thébaudeau458fb1e2012-08-10 18:22:11 +02001046 qh_list->qh_overlay.qt_token =
1047 cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
Michael Trimarchi241f7512008-11-28 13:20:46 +01001048
Rob Herringf14d54b2015-03-17 15:46:37 -05001049 flush_dcache_range((unsigned long)qh_list,
Stephen Warren36dad662013-05-24 15:03:17 -06001050 ALIGN_END_ADDR(struct QH, qh_list, 1));
1051
Patrick Georgie55fdac2013-03-06 14:08:31 +00001052 /* Set async. queue head pointer. */
Marek Vasutdf0b6242016-01-23 21:04:46 +01001053 ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
Patrick Georgie55fdac2013-03-06 14:08:31 +00001054
1055 /*
1056 * Set up periodic list
1057 * Step 1: Parent QH for all periodic transfers.
1058 */
Simon Glassccc40fd2015-03-25 12:22:26 -06001059 ctrl->periodic_schedules = 0;
1060 periodic = &ctrl->periodic_queue;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001061 memset(periodic, 0, sizeof(*periodic));
1062 periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1063 periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1064 periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1065
Rob Herringf14d54b2015-03-17 15:46:37 -05001066 flush_dcache_range((unsigned long)periodic,
Stephen Warren36dad662013-05-24 15:03:17 -06001067 ALIGN_END_ADDR(struct QH, periodic, 1));
1068
Patrick Georgie55fdac2013-03-06 14:08:31 +00001069 /*
1070 * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1071 * In particular, device specifications on polling frequency
1072 * are disregarded. Keyboards seem to send NAK/NYet reliably
1073 * when polled with an empty buffer.
1074 *
1075 * Split Transactions will be spread across microframes using
1076 * S-mask and C-mask.
1077 */
Simon Glassccc40fd2015-03-25 12:22:26 -06001078 if (ctrl->periodic_list == NULL)
1079 ctrl->periodic_list = memalign(4096, 1024 * 4);
Nikita Kiryanov2f13e442013-07-29 13:27:40 +03001080
Simon Glassccc40fd2015-03-25 12:22:26 -06001081 if (!ctrl->periodic_list)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001082 return -ENOMEM;
1083 for (i = 0; i < 1024; i++) {
Simon Glassccc40fd2015-03-25 12:22:26 -06001084 ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
Adrian Cox29d05872014-04-10 13:29:45 +01001085 | QH_LINK_TYPE_QH);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001086 }
1087
Simon Glassccc40fd2015-03-25 12:22:26 -06001088 flush_dcache_range((unsigned long)ctrl->periodic_list,
1089 ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
Stephen Warren36dad662013-05-24 15:03:17 -06001090 1024));
1091
Patrick Georgie55fdac2013-03-06 14:08:31 +00001092 /* Set periodic list base address */
Simon Glassccc40fd2015-03-25 12:22:26 -06001093 ehci_writel(&ctrl->hcor->or_periodiclistbase,
1094 (unsigned long)ctrl->periodic_list);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001095
Simon Glassccc40fd2015-03-25 12:22:26 -06001096 reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
michael0bf2a032008-12-11 13:43:55 +01001097 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
Lucas Stachf5b34082012-09-28 00:26:19 +02001098 debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
Remy Böhmer33e87482008-12-13 22:51:58 +01001099 /* Port Indicators */
1100 if (HCS_INDICATOR(reg))
Lucas Stach835e11e2012-09-06 08:00:13 +02001101 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1102 | 0x80, &descriptor.hub.wHubCharacteristics);
Remy Böhmer33e87482008-12-13 22:51:58 +01001103 /* Port Power Control */
1104 if (HCS_PPC(reg))
Lucas Stach835e11e2012-09-06 08:00:13 +02001105 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1106 | 0x01, &descriptor.hub.wHubCharacteristics);
Michael Trimarchi241f7512008-11-28 13:20:46 +01001107
Michael Trimarchi241f7512008-11-28 13:20:46 +01001108 /* Start the host controller. */
Simon Glassccc40fd2015-03-25 12:22:26 -06001109 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Wolfgang Denkfb718e12009-02-12 00:08:39 +01001110 /*
1111 * Philips, Intel, and maybe others need CMD_RUN before the
1112 * root hub will detect new devices (why?); NEC doesn't
1113 */
michael0bf2a032008-12-11 13:43:55 +01001114 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1115 cmd |= CMD_RUN;
Simon Glassccc40fd2015-03-25 12:22:26 -06001116 ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
michael0bf2a032008-12-11 13:43:55 +01001117
Simon Glassccc40fd2015-03-25 12:22:26 -06001118 if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1119 /* take control over the ports */
1120 cmd = ehci_readl(&ctrl->hcor->or_configflag);
1121 cmd |= FLAG_CF;
1122 ehci_writel(&ctrl->hcor->or_configflag, cmd);
1123 }
Kuo-Jung Sub5d59de2013-05-15 15:29:23 +08001124
Remy Böhmer33e87482008-12-13 22:51:58 +01001125 /* unblock posted write */
Simon Glassccc40fd2015-03-25 12:22:26 -06001126 cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
Mike Frysinger60ce19a2012-03-05 13:47:00 +00001127 mdelay(5);
Simon Glassccc40fd2015-03-25 12:22:26 -06001128 reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
Remy Böhmer33e87482008-12-13 22:51:58 +01001129 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
Michael Trimarchi241f7512008-11-28 13:20:46 +01001130
Simon Glassccc40fd2015-03-25 12:22:26 -06001131 return 0;
1132}
1133
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +01001134#if !CONFIG_IS_ENABLED(DM_USB)
Simon Glassccc40fd2015-03-25 12:22:26 -06001135int usb_lowlevel_stop(int index)
1136{
1137 ehci_shutdown(&ehcic[index]);
1138 return ehci_hcd_stop(index);
1139}
1140
1141int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1142{
1143 struct ehci_ctrl *ctrl = &ehcic[index];
1144 uint tweaks = 0;
1145 int rc;
1146
Simon Glassdc9f3ed2015-03-25 12:22:27 -06001147 /**
1148 * Set ops to default_ehci_ops, ehci_hcd_init should call
1149 * ehci_set_controller_priv to change any of these function pointers.
1150 */
1151 ctrl->ops = default_ehci_ops;
1152
Simon Glassccc40fd2015-03-25 12:22:26 -06001153 rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1154 if (rc)
1155 return rc;
Heinrich Schuchardtab4304b2017-11-20 19:33:39 +01001156 if (!ctrl->hccr || !ctrl->hcor)
1157 return -1;
Simon Glassccc40fd2015-03-25 12:22:26 -06001158 if (init == USB_INIT_DEVICE)
1159 goto done;
1160
1161 /* EHCI spec section 4.1 */
Simon Glass302696b2015-03-25 12:22:28 -06001162 if (ehci_reset(ctrl))
Simon Glassccc40fd2015-03-25 12:22:26 -06001163 return -1;
1164
1165#if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1166 rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1167 if (rc)
1168 return rc;
1169#endif
1170#ifdef CONFIG_USB_EHCI_FARADAY
1171 tweaks |= EHCI_TWEAK_NO_INIT_CF;
1172#endif
1173 rc = ehci_common_init(ctrl, tweaks);
1174 if (rc)
1175 return rc;
1176
1177 ctrl->rootdev = 0;
Troy Kisky7d6bbb92013-10-10 15:27:57 -07001178done:
Lucas Stach3494a4c2012-09-26 00:14:35 +02001179 *controller = &ehcic[index];
Michael Trimarchi241f7512008-11-28 13:20:46 +01001180 return 0;
1181}
Simon Glassa194b252015-03-25 12:22:29 -06001182#endif
Michael Trimarchi241f7512008-11-28 13:20:46 +01001183
Simon Glasscb7cf602015-03-25 12:22:25 -06001184static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1185 void *buffer, int length)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001186{
1187
1188 if (usb_pipetype(pipe) != PIPE_BULK) {
1189 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1190 return -1;
1191 }
1192 return ehci_submit_async(dev, pipe, buffer, length, NULL);
1193}
1194
Simon Glasscb7cf602015-03-25 12:22:25 -06001195static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1196 void *buffer, int length,
1197 struct devrequest *setup)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001198{
Simon Glasscb7cf602015-03-25 12:22:25 -06001199 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Michael Trimarchi241f7512008-11-28 13:20:46 +01001200
1201 if (usb_pipetype(pipe) != PIPE_CONTROL) {
1202 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1203 return -1;
1204 }
1205
Lucas Stach3494a4c2012-09-26 00:14:35 +02001206 if (usb_pipedevice(pipe) == ctrl->rootdev) {
1207 if (!ctrl->rootdev)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001208 dev->speed = USB_SPEED_HIGH;
1209 return ehci_submit_root(dev, pipe, buffer, length, setup);
1210 }
1211 return ehci_submit_async(dev, pipe, buffer, length, setup);
1212}
1213
Patrick Georgie55fdac2013-03-06 14:08:31 +00001214struct int_queue {
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001215 int elementsize;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001216 unsigned long pipe;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001217 struct QH *first;
1218 struct QH *current;
1219 struct QH *last;
1220 struct qTD *tds;
1221};
1222
Rob Herringf14d54b2015-03-17 15:46:37 -05001223#define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001224
1225static int
1226enable_periodic(struct ehci_ctrl *ctrl)
1227{
1228 uint32_t cmd;
1229 struct ehci_hcor *hcor = ctrl->hcor;
1230 int ret;
1231
1232 cmd = ehci_readl(&hcor->or_usbcmd);
1233 cmd |= CMD_PSE;
1234 ehci_writel(&hcor->or_usbcmd, cmd);
1235
1236 ret = handshake((uint32_t *)&hcor->or_usbsts,
1237 STS_PSS, STS_PSS, 100 * 1000);
1238 if (ret < 0) {
1239 printf("EHCI failed: timeout when enabling periodic list\n");
1240 return -ETIMEDOUT;
1241 }
1242 udelay(1000);
1243 return 0;
1244}
1245
1246static int
1247disable_periodic(struct ehci_ctrl *ctrl)
1248{
1249 uint32_t cmd;
1250 struct ehci_hcor *hcor = ctrl->hcor;
1251 int ret;
1252
1253 cmd = ehci_readl(&hcor->or_usbcmd);
1254 cmd &= ~CMD_PSE;
1255 ehci_writel(&hcor->or_usbcmd, cmd);
1256
1257 ret = handshake((uint32_t *)&hcor->or_usbsts,
1258 STS_PSS, 0, 100 * 1000);
1259 if (ret < 0) {
1260 printf("EHCI failed: timeout when disabling periodic list\n");
1261 return -ETIMEDOUT;
1262 }
1263 return 0;
1264}
1265
Hans de Goede53ca9de2015-05-11 20:43:52 +02001266static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1267 unsigned long pipe, int queuesize, int elementsize,
1268 void *buffer, int interval)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001269{
Simon Glasscb7cf602015-03-25 12:22:25 -06001270 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001271 struct int_queue *result = NULL;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001272 uint32_t i, toggle;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001273
Hans de Goede7f7cb732014-09-24 14:06:04 +02001274 /*
1275 * Interrupt transfers requiring several transactions are not supported
1276 * because bInterval is ignored.
1277 *
1278 * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1279 * <= PKT_ALIGN if several qTDs are required, while the USB
1280 * specification does not constrain this for interrupt transfers. That
1281 * means that ehci_submit_async() would support interrupt transfers
1282 * requiring several transactions only as long as the transfer size does
1283 * not require more than a single qTD.
1284 */
1285 if (elementsize > usb_maxpacket(dev, pipe)) {
1286 printf("%s: xfers requiring several transactions are not supported.\n",
1287 __func__);
1288 return NULL;
1289 }
1290
Patrick Georgie55fdac2013-03-06 14:08:31 +00001291 debug("Enter create_int_queue\n");
1292 if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1293 debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1294 return NULL;
1295 }
1296
1297 /* limit to 4 full pages worth of data -
1298 * we can safely fit them in a single TD,
1299 * no matter the alignment
1300 */
1301 if (elementsize >= 16384) {
1302 debug("too large elements for interrupt transfers\n");
1303 return NULL;
1304 }
1305
1306 result = malloc(sizeof(*result));
1307 if (!result) {
1308 debug("ehci intr queue: out of memory\n");
1309 goto fail1;
1310 }
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001311 result->elementsize = elementsize;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001312 result->pipe = pipe;
Stephen Warrend7fe61d2014-02-06 13:13:06 -07001313 result->first = memalign(USB_DMA_MINALIGN,
1314 sizeof(struct QH) * queuesize);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001315 if (!result->first) {
1316 debug("ehci intr queue: out of memory\n");
1317 goto fail2;
1318 }
1319 result->current = result->first;
1320 result->last = result->first + queuesize - 1;
Stephen Warrend7fe61d2014-02-06 13:13:06 -07001321 result->tds = memalign(USB_DMA_MINALIGN,
1322 sizeof(struct qTD) * queuesize);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001323 if (!result->tds) {
1324 debug("ehci intr queue: out of memory\n");
1325 goto fail3;
1326 }
1327 memset(result->first, 0, sizeof(struct QH) * queuesize);
1328 memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1329
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001330 toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1331
Patrick Georgie55fdac2013-03-06 14:08:31 +00001332 for (i = 0; i < queuesize; i++) {
1333 struct QH *qh = result->first + i;
1334 struct qTD *td = result->tds + i;
1335 void **buf = &qh->buffer;
1336
Rob Herringf14d54b2015-03-17 15:46:37 -05001337 qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001338 if (i == queuesize - 1)
Adrian Cox29d05872014-04-10 13:29:45 +01001339 qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001340
Rob Herringf14d54b2015-03-17 15:46:37 -05001341 qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
Adrian Cox29d05872014-04-10 13:29:45 +01001342 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1343 qh->qh_endpt1 =
1344 cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
Patrick Georgie55fdac2013-03-06 14:08:31 +00001345 (usb_maxpacket(dev, pipe) << 16) | /* MPS */
1346 (1 << 14) |
1347 QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1348 (usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
Adrian Cox29d05872014-04-10 13:29:45 +01001349 (usb_pipedevice(pipe) << 0));
1350 qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1351 (1 << 0)); /* S-mask: microframe 0 */
Patrick Georgie55fdac2013-03-06 14:08:31 +00001352 if (dev->speed == USB_SPEED_LOW ||
1353 dev->speed == USB_SPEED_FULL) {
Hans de Goededa166772014-09-20 16:51:22 +02001354 /* C-mask: microframes 2-4 */
1355 qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
Patrick Georgie55fdac2013-03-06 14:08:31 +00001356 }
Hans de Goededa166772014-09-20 16:51:22 +02001357 ehci_update_endpt2_dev_n_port(dev, qh);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001358
Adrian Cox29d05872014-04-10 13:29:45 +01001359 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1360 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001361 debug("communication direction is '%s'\n",
1362 usb_pipein(pipe) ? "in" : "out");
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001363 td->qt_token = cpu_to_hc32(
1364 QT_TOKEN_DT(toggle) |
1365 (elementsize << 16) |
Patrick Georgie55fdac2013-03-06 14:08:31 +00001366 ((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
Adrian Cox29d05872014-04-10 13:29:45 +01001367 0x80); /* active */
1368 td->qt_buffer[0] =
Rob Herringf14d54b2015-03-17 15:46:37 -05001369 cpu_to_hc32((unsigned long)buffer + i * elementsize);
Adrian Cox29d05872014-04-10 13:29:45 +01001370 td->qt_buffer[1] =
1371 cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1372 td->qt_buffer[2] =
1373 cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1374 td->qt_buffer[3] =
1375 cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1376 td->qt_buffer[4] =
1377 cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001378
1379 *buf = buffer + i * elementsize;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001380 toggle ^= 1;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001381 }
1382
Rob Herringf14d54b2015-03-17 15:46:37 -05001383 flush_dcache_range((unsigned long)buffer,
Stephen Warren36dad662013-05-24 15:03:17 -06001384 ALIGN_END_ADDR(char, buffer,
1385 queuesize * elementsize));
Rob Herringf14d54b2015-03-17 15:46:37 -05001386 flush_dcache_range((unsigned long)result->first,
Stephen Warren36dad662013-05-24 15:03:17 -06001387 ALIGN_END_ADDR(struct QH, result->first,
1388 queuesize));
Rob Herringf14d54b2015-03-17 15:46:37 -05001389 flush_dcache_range((unsigned long)result->tds,
Stephen Warren36dad662013-05-24 15:03:17 -06001390 ALIGN_END_ADDR(struct qTD, result->tds,
1391 queuesize));
1392
Hans de Goede8ba55ed2014-09-24 14:06:03 +02001393 if (ctrl->periodic_schedules > 0) {
1394 if (disable_periodic(ctrl) < 0) {
1395 debug("FATAL: periodic should never fail, but did");
1396 goto fail3;
1397 }
Patrick Georgie55fdac2013-03-06 14:08:31 +00001398 }
1399
1400 /* hook up to periodic list */
1401 struct QH *list = &ctrl->periodic_queue;
1402 result->last->qh_link = list->qh_link;
Rob Herringf14d54b2015-03-17 15:46:37 -05001403 list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001404
Rob Herringf14d54b2015-03-17 15:46:37 -05001405 flush_dcache_range((unsigned long)result->last,
Stephen Warren36dad662013-05-24 15:03:17 -06001406 ALIGN_END_ADDR(struct QH, result->last, 1));
Rob Herringf14d54b2015-03-17 15:46:37 -05001407 flush_dcache_range((unsigned long)list,
Stephen Warren36dad662013-05-24 15:03:17 -06001408 ALIGN_END_ADDR(struct QH, list, 1));
1409
Patrick Georgie55fdac2013-03-06 14:08:31 +00001410 if (enable_periodic(ctrl) < 0) {
1411 debug("FATAL: periodic should never fail, but did");
1412 goto fail3;
1413 }
Hans de Goede8f5f4f72014-09-20 16:51:25 +02001414 ctrl->periodic_schedules++;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001415
1416 debug("Exit create_int_queue\n");
1417 return result;
1418fail3:
Heinrich Schuchardt4b88d6f2020-04-19 12:02:28 +02001419 free(result->tds);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001420fail2:
Heinrich Schuchardt4b88d6f2020-04-19 12:02:28 +02001421 free(result->first);
1422 free(result);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001423fail1:
1424 return NULL;
1425}
1426
Hans de Goede53ca9de2015-05-11 20:43:52 +02001427static void *_ehci_poll_int_queue(struct usb_device *dev,
1428 struct int_queue *queue)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001429{
1430 struct QH *cur = queue->current;
Hans de Goede9db174c2014-09-20 16:51:24 +02001431 struct qTD *cur_td;
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001432 uint32_t token, toggle;
1433 unsigned long pipe = queue->pipe;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001434
1435 /* depleted queue */
1436 if (cur == NULL) {
1437 debug("Exit poll_int_queue with completed queue\n");
1438 return NULL;
1439 }
1440 /* still active */
Hans de Goede9db174c2014-09-20 16:51:24 +02001441 cur_td = &queue->tds[queue->current - queue->first];
Rob Herringf14d54b2015-03-17 15:46:37 -05001442 invalidate_dcache_range((unsigned long)cur_td,
Hans de Goede9db174c2014-09-20 16:51:24 +02001443 ALIGN_END_ADDR(struct qTD, cur_td, 1));
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001444 token = hc32_to_cpu(cur_td->qt_token);
1445 if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1446 debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001447 return NULL;
1448 }
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001449
1450 toggle = QT_TOKEN_GET_DT(token);
1451 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1452
Patrick Georgie55fdac2013-03-06 14:08:31 +00001453 if (!(cur->qh_link & QH_LINK_TERMINATE))
1454 queue->current++;
1455 else
1456 queue->current = NULL;
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001457
Rob Herringf14d54b2015-03-17 15:46:37 -05001458 invalidate_dcache_range((unsigned long)cur->buffer,
Hans de Goede8c5c5ca2014-09-24 14:06:05 +02001459 ALIGN_END_ADDR(char, cur->buffer,
1460 queue->elementsize));
1461
Hans de Goede9db174c2014-09-20 16:51:24 +02001462 debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
Hans de Goede61a5a1c2015-06-18 22:34:33 +02001463 token, cur, queue->first);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001464 return cur->buffer;
1465}
1466
1467/* Do not free buffers associated with QHs, they're owned by someone else */
Hans de Goede53ca9de2015-05-11 20:43:52 +02001468static int _ehci_destroy_int_queue(struct usb_device *dev,
1469 struct int_queue *queue)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001470{
Simon Glasscb7cf602015-03-25 12:22:25 -06001471 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001472 int result = -1;
1473 unsigned long timeout;
1474
1475 if (disable_periodic(ctrl) < 0) {
1476 debug("FATAL: periodic should never fail, but did");
1477 goto out;
1478 }
Hans de Goede8f5f4f72014-09-20 16:51:25 +02001479 ctrl->periodic_schedules--;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001480
1481 struct QH *cur = &ctrl->periodic_queue;
1482 timeout = get_timer(0) + 500; /* abort after 500ms */
Adrian Cox29d05872014-04-10 13:29:45 +01001483 while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
Patrick Georgie55fdac2013-03-06 14:08:31 +00001484 debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1485 if (NEXT_QH(cur) == queue->first) {
1486 debug("found candidate. removing from chain\n");
1487 cur->qh_link = queue->last->qh_link;
Rob Herringf14d54b2015-03-17 15:46:37 -05001488 flush_dcache_range((unsigned long)cur,
Hans de Goede8e00cf62014-09-20 16:51:23 +02001489 ALIGN_END_ADDR(struct QH, cur, 1));
Patrick Georgie55fdac2013-03-06 14:08:31 +00001490 result = 0;
1491 break;
1492 }
1493 cur = NEXT_QH(cur);
1494 if (get_timer(0) > timeout) {
1495 printf("Timeout destroying interrupt endpoint queue\n");
1496 result = -1;
1497 goto out;
1498 }
1499 }
1500
Hans de Goede8f5f4f72014-09-20 16:51:25 +02001501 if (ctrl->periodic_schedules > 0) {
Patrick Georgie55fdac2013-03-06 14:08:31 +00001502 result = enable_periodic(ctrl);
1503 if (result < 0)
1504 debug("FATAL: periodic should never fail, but did");
1505 }
1506
1507out:
1508 free(queue->tds);
1509 free(queue->first);
1510 free(queue);
1511
1512 return result;
1513}
1514
Simon Glasscb7cf602015-03-25 12:22:25 -06001515static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001516 void *buffer, int length, int interval,
1517 bool nonblock)
Michael Trimarchi241f7512008-11-28 13:20:46 +01001518{
Patrick Georgie55fdac2013-03-06 14:08:31 +00001519 void *backbuffer;
1520 struct int_queue *queue;
1521 unsigned long timeout;
1522 int result = 0, ret;
1523
Michael Trimarchi241f7512008-11-28 13:20:46 +01001524 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1525 dev, pipe, buffer, length, interval);
Benoît Thébaudeau58c4dfb2012-08-09 23:50:44 +02001526
Hans de Goede53ca9de2015-05-11 20:43:52 +02001527 queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
Hans de Goede7f7cb732014-09-24 14:06:04 +02001528 if (!queue)
1529 return -1;
Patrick Georgie55fdac2013-03-06 14:08:31 +00001530
1531 timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
Hans de Goede53ca9de2015-05-11 20:43:52 +02001532 while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
Patrick Georgie55fdac2013-03-06 14:08:31 +00001533 if (get_timer(0) > timeout) {
1534 printf("Timeout poll on interrupt endpoint\n");
1535 result = -ETIMEDOUT;
1536 break;
1537 }
1538
1539 if (backbuffer != buffer) {
Rob Herringf14d54b2015-03-17 15:46:37 -05001540 debug("got wrong buffer back (%p instead of %p)\n",
1541 backbuffer, buffer);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001542 return -EINVAL;
1543 }
1544
Hans de Goede53ca9de2015-05-11 20:43:52 +02001545 ret = _ehci_destroy_int_queue(dev, queue);
Patrick Georgie55fdac2013-03-06 14:08:31 +00001546 if (ret < 0)
1547 return ret;
1548
1549 /* everything worked out fine */
1550 return result;
Marek Vasut9b315fe2011-09-25 21:07:56 +02001551}
Simon Glasscb7cf602015-03-25 12:22:25 -06001552
Marek Vasut118a9032020-04-06 14:29:44 +02001553static int _ehci_lock_async(struct ehci_ctrl *ctrl, int lock)
1554{
1555 ctrl->async_locked = lock;
1556
1557 if (lock)
1558 return 0;
1559
1560 return ehci_disable_async(ctrl);
1561}
1562
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +01001563#if !CONFIG_IS_ENABLED(DM_USB)
Simon Glasscb7cf602015-03-25 12:22:25 -06001564int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1565 void *buffer, int length)
1566{
1567 return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1568}
1569
1570int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1571 int length, struct devrequest *setup)
1572{
1573 return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1574}
1575
1576int submit_int_msg(struct usb_device *dev, unsigned long pipe,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001577 void *buffer, int length, int interval, bool nonblock)
Simon Glasscb7cf602015-03-25 12:22:25 -06001578{
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001579 return _ehci_submit_int_msg(dev, pipe, buffer, length, interval,
1580 nonblock);
Simon Glasscb7cf602015-03-25 12:22:25 -06001581}
Hans de Goede53ca9de2015-05-11 20:43:52 +02001582
1583struct int_queue *create_int_queue(struct usb_device *dev,
1584 unsigned long pipe, int queuesize, int elementsize,
1585 void *buffer, int interval)
1586{
1587 return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1588 buffer, interval);
1589}
1590
1591void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1592{
1593 return _ehci_poll_int_queue(dev, queue);
1594}
1595
1596int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1597{
1598 return _ehci_destroy_int_queue(dev, queue);
1599}
Marek Vasut118a9032020-04-06 14:29:44 +02001600
1601int usb_lock_async(struct usb_device *dev, int lock)
1602{
1603 struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1604
1605 return _ehci_lock_async(ctrl, lock);
1606}
Simon Glassa194b252015-03-25 12:22:29 -06001607#endif
1608
Sven Schwermer8a3cb9f12018-11-21 08:43:56 +01001609#if CONFIG_IS_ENABLED(DM_USB)
Simon Glassa194b252015-03-25 12:22:29 -06001610static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1611 unsigned long pipe, void *buffer, int length,
1612 struct devrequest *setup)
1613{
1614 debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1615 dev->name, udev, udev->dev->name, udev->portnr);
1616
1617 return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1618}
1619
1620static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1621 unsigned long pipe, void *buffer, int length)
1622{
1623 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1624 return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1625}
1626
1627static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1628 unsigned long pipe, void *buffer, int length,
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001629 int interval, bool nonblock)
Simon Glassa194b252015-03-25 12:22:29 -06001630{
1631 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
Michal Suchanek1c95b9f2019-08-18 10:55:27 +02001632 return _ehci_submit_int_msg(udev, pipe, buffer, length, interval,
1633 nonblock);
Simon Glassa194b252015-03-25 12:22:29 -06001634}
1635
Hans de Goede0a7fa272015-05-10 14:10:18 +02001636static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1637 struct usb_device *udev, unsigned long pipe, int queuesize,
1638 int elementsize, void *buffer, int interval)
1639{
1640 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1641 return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1642 buffer, interval);
1643}
1644
1645static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1646 struct int_queue *queue)
1647{
1648 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1649 return _ehci_poll_int_queue(udev, queue);
1650}
1651
1652static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1653 struct int_queue *queue)
1654{
1655 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1656 return _ehci_destroy_int_queue(udev, queue);
1657}
1658
Bin Meng0441b872017-09-07 06:13:19 -07001659static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1660{
1661 /*
1662 * EHCD can handle any transfer length as long as there is enough
1663 * free heap space left, hence set the theoretical max number here.
1664 */
1665 *size = SIZE_MAX;
1666
1667 return 0;
1668}
1669
Marek Vasut118a9032020-04-06 14:29:44 +02001670static int ehci_lock_async(struct udevice *dev, int lock)
1671{
1672 struct ehci_ctrl *ctrl = dev_get_priv(dev);
1673
1674 return _ehci_lock_async(ctrl, lock);
1675}
1676
Simon Glassa194b252015-03-25 12:22:29 -06001677int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1678 struct ehci_hcor *hcor, const struct ehci_ops *ops,
1679 uint tweaks, enum usb_init_type init)
1680{
Hans de Goede76bc7f42015-05-05 11:54:35 +02001681 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
Simon Glassa194b252015-03-25 12:22:29 -06001682 struct ehci_ctrl *ctrl = dev_get_priv(dev);
Heinrich Schuchardtab4304b2017-11-20 19:33:39 +01001683 int ret = -1;
Simon Glassa194b252015-03-25 12:22:29 -06001684
1685 debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1686 dev->name, ctrl, hccr, hcor, init);
1687
Heinrich Schuchardtab4304b2017-11-20 19:33:39 +01001688 if (!ctrl || !hccr || !hcor)
1689 goto err;
1690
Hans de Goede76bc7f42015-05-05 11:54:35 +02001691 priv->desc_before_addr = true;
1692
Simon Glassa194b252015-03-25 12:22:29 -06001693 ehci_setup_ops(ctrl, ops);
1694 ctrl->hccr = hccr;
1695 ctrl->hcor = hcor;
1696 ctrl->priv = ctrl;
1697
Stephen Warren71eced32015-08-20 17:38:05 -06001698 ctrl->init = init;
1699 if (ctrl->init == USB_INIT_DEVICE)
Simon Glassa194b252015-03-25 12:22:29 -06001700 goto done;
Stephen Warren71eced32015-08-20 17:38:05 -06001701
Simon Glassa194b252015-03-25 12:22:29 -06001702 ret = ehci_reset(ctrl);
1703 if (ret)
1704 goto err;
1705
Mateusz Kulikowski3e13f392016-04-03 13:38:26 +02001706 if (ctrl->ops.init_after_reset) {
1707 ret = ctrl->ops.init_after_reset(ctrl);
Mateusz Kulikowskiaab5a5a2016-03-31 23:12:17 +02001708 if (ret)
1709 goto err;
1710 }
1711
Simon Glassa194b252015-03-25 12:22:29 -06001712 ret = ehci_common_init(ctrl, tweaks);
1713 if (ret)
1714 goto err;
1715done:
1716 return 0;
1717err:
1718 free(ctrl);
1719 debug("%s: failed, ret=%d\n", __func__, ret);
1720 return ret;
1721}
1722
1723int ehci_deregister(struct udevice *dev)
1724{
1725 struct ehci_ctrl *ctrl = dev_get_priv(dev);
1726
Stephen Warren71eced32015-08-20 17:38:05 -06001727 if (ctrl->init == USB_INIT_DEVICE)
1728 return 0;
1729
Simon Glassa194b252015-03-25 12:22:29 -06001730 ehci_shutdown(ctrl);
1731
1732 return 0;
1733}
1734
1735struct dm_usb_ops ehci_usb_ops = {
1736 .control = ehci_submit_control_msg,
1737 .bulk = ehci_submit_bulk_msg,
1738 .interrupt = ehci_submit_int_msg,
Hans de Goede0a7fa272015-05-10 14:10:18 +02001739 .create_int_queue = ehci_create_int_queue,
1740 .poll_int_queue = ehci_poll_int_queue,
1741 .destroy_int_queue = ehci_destroy_int_queue,
Bin Meng0441b872017-09-07 06:13:19 -07001742 .get_max_xfer_size = ehci_get_max_xfer_size,
Marek Vasut118a9032020-04-06 14:29:44 +02001743 .lock_async = ehci_lock_async,
Simon Glassa194b252015-03-25 12:22:29 -06001744};
1745
1746#endif
Marek Vasutd9af6cd2018-08-08 14:29:55 +02001747
1748#ifdef CONFIG_PHY
1749int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1750{
1751 int ret;
1752
1753 if (!phy)
1754 return 0;
1755
1756 ret = generic_phy_get_by_index(dev, index, phy);
1757 if (ret) {
1758 if (ret != -ENOENT) {
1759 dev_err(dev, "failed to get usb phy\n");
1760 return ret;
1761 }
1762 } else {
1763 ret = generic_phy_init(phy);
1764 if (ret) {
1765 dev_err(dev, "failed to init usb phy\n");
1766 return ret;
1767 }
1768
1769 ret = generic_phy_power_on(phy);
1770 if (ret) {
1771 dev_err(dev, "failed to power on usb phy\n");
1772 return generic_phy_exit(phy);
1773 }
1774 }
1775
1776 return 0;
1777}
1778
1779int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1780{
1781 int ret = 0;
1782
1783 if (!phy)
1784 return 0;
1785
1786 if (generic_phy_valid(phy)) {
1787 ret = generic_phy_power_off(phy);
1788 if (ret) {
1789 dev_err(dev, "failed to power off usb phy\n");
1790 return ret;
1791 }
1792
1793 ret = generic_phy_exit(phy);
1794 if (ret) {
1795 dev_err(dev, "failed to power off usb phy\n");
1796 return ret;
1797 }
1798 }
1799
1800 return 0;
1801}
1802#else
1803int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index)
1804{
1805 return 0;
1806}
1807
1808int ehci_shutdown_phy(struct udevice *dev, struct phy *phy)
1809{
1810 return 0;
1811}
1812#endif