blob: 50d194f614b1bd6d6f4e0ca4f07c9c1c39f6171e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Mingkai Hu799efd92011-04-26 16:31:16 +08002/*
3 * eSPI controller driver.
4 *
5 * Copyright 2010-2011 Freescale Semiconductor, Inc.
6 * Author: Mingkai Hu (Mingkai.hu@freescale.com)
Mingkai Hu799efd92011-04-26 16:31:16 +08007 */
8
9#include <common.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060011#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060012#include <linux/delay.h>
Mingkai Hu799efd92011-04-26 16:31:16 +080013
14#include <malloc.h>
15#include <spi.h>
16#include <asm/immap_85xx.h>
17
18struct fsl_spi_slave {
19 struct spi_slave slave;
Hou Zhiqiang433dd002014-05-21 10:25:10 +080020 ccsr_espi_t *espi;
Mingkai Hu799efd92011-04-26 16:31:16 +080021 unsigned int div16;
22 unsigned int pm;
Hou Zhiqiang433dd002014-05-21 10:25:10 +080023 int tx_timeout;
Mingkai Hu799efd92011-04-26 16:31:16 +080024 unsigned int mode;
25 size_t cmd_len;
26 u8 cmd_buf[16];
27 size_t data_len;
28 unsigned int max_transfer_length;
29};
30
31#define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave)
Hou Zhiqiang433dd002014-05-21 10:25:10 +080032#define US_PER_SECOND 1000000UL
Mingkai Hu799efd92011-04-26 16:31:16 +080033
34#define ESPI_MAX_CS_NUM 4
Hou Zhiqiang433dd002014-05-21 10:25:10 +080035#define ESPI_FIFO_WIDTH_BIT 32
Mingkai Hu799efd92011-04-26 16:31:16 +080036
Jagan Tekic97ca922015-10-23 01:37:18 +053037#define ESPI_EV_RNE BIT(9)
38#define ESPI_EV_TNF BIT(8)
39#define ESPI_EV_DON BIT(14)
40#define ESPI_EV_TXE BIT(15)
Hou Zhiqiang433dd002014-05-21 10:25:10 +080041#define ESPI_EV_RFCNT_SHIFT 24
42#define ESPI_EV_RFCNT_MASK (0x3f << ESPI_EV_RFCNT_SHIFT)
Mingkai Hu799efd92011-04-26 16:31:16 +080043
Jagan Tekic97ca922015-10-23 01:37:18 +053044#define ESPI_MODE_EN BIT(31) /* Enable interface */
Mingkai Hu799efd92011-04-26 16:31:16 +080045#define ESPI_MODE_TXTHR(x) ((x) << 8) /* Tx FIFO threshold */
46#define ESPI_MODE_RXTHR(x) ((x) << 0) /* Rx FIFO threshold */
47
48#define ESPI_COM_CS(x) ((x) << 30)
49#define ESPI_COM_TRANLEN(x) ((x) << 0)
50
Jagan Tekic97ca922015-10-23 01:37:18 +053051#define ESPI_CSMODE_CI_INACTIVEHIGH BIT(31)
52#define ESPI_CSMODE_CP_BEGIN_EDGCLK BIT(30)
53#define ESPI_CSMODE_REV_MSB_FIRST BIT(29)
54#define ESPI_CSMODE_DIV16 BIT(28)
Mingkai Hu799efd92011-04-26 16:31:16 +080055#define ESPI_CSMODE_PM(x) ((x) << 24)
Jagan Tekic97ca922015-10-23 01:37:18 +053056#define ESPI_CSMODE_POL_ASSERTED_LOW BIT(20)
Mingkai Hu799efd92011-04-26 16:31:16 +080057#define ESPI_CSMODE_LEN(x) ((x) << 16)
58#define ESPI_CSMODE_CSBEF(x) ((x) << 12)
59#define ESPI_CSMODE_CSAFT(x) ((x) << 8)
60#define ESPI_CSMODE_CSCG(x) ((x) << 3)
61
62#define ESPI_CSMODE_INIT_VAL (ESPI_CSMODE_POL_ASSERTED_LOW | \
63 ESPI_CSMODE_CSBEF(0) | ESPI_CSMODE_CSAFT(0) | \
64 ESPI_CSMODE_CSCG(1))
65
66#define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
67
68struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
69 unsigned int max_hz, unsigned int mode)
70{
71 struct fsl_spi_slave *fsl;
72 sys_info_t sysinfo;
73 unsigned long spibrg = 0;
Hou Zhiqiang433dd002014-05-21 10:25:10 +080074 unsigned long spi_freq = 0;
Mingkai Hu799efd92011-04-26 16:31:16 +080075 unsigned char pm = 0;
76
77 if (!spi_cs_is_valid(bus, cs))
78 return NULL;
79
Simon Glassd034a952013-03-18 19:23:40 +000080 fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
Mingkai Hu799efd92011-04-26 16:31:16 +080081 if (!fsl)
82 return NULL;
83
Hou Zhiqiang433dd002014-05-21 10:25:10 +080084 fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
Mingkai Hu799efd92011-04-26 16:31:16 +080085 fsl->mode = mode;
86 fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
87
88 /* Set eSPI BRG clock source */
89 get_sys_info(&sysinfo);
Prabhakar Kushwahad1698082013-08-16 14:52:26 +053090 spibrg = sysinfo.freq_systembus / 2;
Mingkai Hu799efd92011-04-26 16:31:16 +080091 fsl->div16 = 0;
92 if ((spibrg / max_hz) > 32) {
93 fsl->div16 = ESPI_CSMODE_DIV16;
94 pm = spibrg / (max_hz * 16 * 2);
95 if (pm > 16) {
96 pm = 16;
Marek Vasutd36e8c32011-10-21 14:17:20 +000097 debug("Requested speed is too low: %d Hz, %ld Hz "
98 "is used.\n", max_hz, spibrg / (32 * 16));
Mingkai Hu799efd92011-04-26 16:31:16 +080099 }
100 } else
101 pm = spibrg / (max_hz * 2);
102 if (pm)
103 pm--;
104 fsl->pm = pm;
105
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800106 if (fsl->div16)
107 spi_freq = spibrg / ((pm + 1) * 2 * 16);
108 else
109 spi_freq = spibrg / ((pm + 1) * 2);
110
111 /* set tx_timeout to 10 times of one espi FIFO entry go out */
112 fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT
113 * 10), spi_freq);
114
Mingkai Hu799efd92011-04-26 16:31:16 +0800115 return &fsl->slave;
116}
117
118void spi_free_slave(struct spi_slave *slave)
119{
120 struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
121 free(fsl);
122}
123
Mingkai Hu799efd92011-04-26 16:31:16 +0800124int spi_claim_bus(struct spi_slave *slave)
125{
126 struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800127 ccsr_espi_t *espi = fsl->espi;
Mingkai Hu799efd92011-04-26 16:31:16 +0800128 unsigned char pm = fsl->pm;
129 unsigned int cs = slave->cs;
130 unsigned int mode = fsl->mode;
131 unsigned int div16 = fsl->div16;
132 int i;
133
134 debug("%s: bus:%i cs:%i\n", __func__, slave->bus, cs);
135
136 /* Enable eSPI interface */
137 out_be32(&espi->mode, ESPI_MODE_RXTHR(3)
138 | ESPI_MODE_TXTHR(4) | ESPI_MODE_EN);
139
140 out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */
141 out_be32(&espi->mask, 0x00000000); /* Mask all eSPI interrupts */
142
143 /* Init CS mode interface */
144 for (i = 0; i < ESPI_MAX_CS_NUM; i++)
145 out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL);
146
147 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) &
148 ~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16
149 | ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK
150 | ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF)));
151
152 /* Set eSPI BRG clock source */
153 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
154 | ESPI_CSMODE_PM(pm) | div16);
155
156 /* Set eSPI mode */
157 if (mode & SPI_CPHA)
158 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
159 | ESPI_CSMODE_CP_BEGIN_EDGCLK);
160 if (mode & SPI_CPOL)
161 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
162 | ESPI_CSMODE_CI_INACTIVEHIGH);
163
164 /* Character bit order: msb first */
165 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
166 | ESPI_CSMODE_REV_MSB_FIRST);
167
168 /* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */
169 out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
170 | ESPI_CSMODE_LEN(7));
171
172 return 0;
173}
174
175void spi_release_bus(struct spi_slave *slave)
176{
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800177
178}
179
180static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout)
181{
182 ccsr_espi_t *espi = fsl->espi;
183 unsigned int tmpdout, event;
184 int tmp_tx_timeout;
185
186 if (dout)
187 tmpdout = *(u32 *)dout;
188 else
189 tmpdout = 0;
190
191 out_be32(&espi->tx, tmpdout);
192 out_be32(&espi->event, ESPI_EV_TNF);
193 debug("***spi_xfer:...%08x written\n", tmpdout);
194
195 tmp_tx_timeout = fsl->tx_timeout;
196 /* Wait for eSPI transmit to go out */
197 while (tmp_tx_timeout--) {
198 event = in_be32(&espi->event);
199 if (event & ESPI_EV_DON || event & ESPI_EV_TXE) {
200 out_be32(&espi->event, ESPI_EV_TXE);
201 break;
202 }
203 udelay(1);
204 }
205
206 if (tmp_tx_timeout < 0)
207 debug("***spi_xfer:...Tx timeout! event = %08x\n", event);
208}
209
210static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, unsigned int bytes)
211{
212 ccsr_espi_t *espi = fsl->espi;
213 unsigned int tmpdin, rx_times;
214 unsigned char *buf, *p_cursor;
215
216 if (bytes <= 0)
217 return 0;
218
219 rx_times = DIV_ROUND_UP(bytes, 4);
220 buf = (unsigned char *)malloc(4 * rx_times);
221 if (!buf) {
222 debug("SF: Failed to malloc memory.\n");
223 return -1;
224 }
225 p_cursor = buf;
226 while (rx_times--) {
227 tmpdin = in_be32(&espi->rx);
228 debug("***spi_xfer:...%08x readed\n", tmpdin);
229 *(u32 *)p_cursor = tmpdin;
230 p_cursor += 4;
231 }
232
233 if (din)
234 memcpy(din, buf, bytes);
Mingkai Hu799efd92011-04-26 16:31:16 +0800235
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800236 free(buf);
237 out_be32(&espi->event, ESPI_EV_RNE);
238
239 return bytes;
Mingkai Hu799efd92011-04-26 16:31:16 +0800240}
241
242int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
243 void *data_in, unsigned long flags)
244{
245 struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800246 ccsr_espi_t *espi = fsl->espi;
247 unsigned int event, rx_bytes;
Mingkai Hu799efd92011-04-26 16:31:16 +0800248 const void *dout = NULL;
249 void *din = NULL;
250 int len = 0;
251 int num_blks, num_chunks, max_tran_len, tran_len;
252 int num_bytes;
Mingkai Hu799efd92011-04-26 16:31:16 +0800253 unsigned char *buffer = NULL;
254 size_t buf_len;
255 u8 *cmd_buf = fsl->cmd_buf;
256 size_t cmd_len = fsl->cmd_len;
257 size_t data_len = bitlen / 8;
258 size_t rx_offset = 0;
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800259 int rf_cnt;
Mingkai Hu799efd92011-04-26 16:31:16 +0800260
261 max_tran_len = fsl->max_transfer_length;
262 switch (flags) {
263 case SPI_XFER_BEGIN:
264 cmd_len = fsl->cmd_len = data_len;
265 memcpy(cmd_buf, data_out, cmd_len);
266 return 0;
267 case 0:
268 case SPI_XFER_END:
269 if (bitlen == 0) {
270 spi_cs_deactivate(slave);
271 return 0;
272 }
Masahiro Yamadadb204642014-11-07 03:03:31 +0900273 buf_len = 2 * cmd_len + min(data_len, (size_t)max_tran_len);
Mingkai Hu799efd92011-04-26 16:31:16 +0800274 len = cmd_len + data_len;
275 rx_offset = cmd_len;
276 buffer = (unsigned char *)malloc(buf_len);
277 if (!buffer) {
278 debug("SF: Failed to malloc memory.\n");
279 return 1;
280 }
281 memcpy(buffer, cmd_buf, cmd_len);
Shaohui Xie45cead82012-10-11 20:31:46 +0000282 if (data_in == NULL)
283 memcpy(buffer + cmd_len, data_out, data_len);
Mingkai Hu799efd92011-04-26 16:31:16 +0800284 break;
285 case SPI_XFER_BEGIN | SPI_XFER_END:
286 len = data_len;
287 buffer = (unsigned char *)malloc(len * 2);
288 if (!buffer) {
289 debug("SF: Failed to malloc memory.\n");
290 return 1;
291 }
292 memcpy(buffer, data_out, len);
293 rx_offset = len;
294 cmd_len = 0;
295 break;
296 }
297
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800298 debug("spi_xfer: data_out %08X(%p) data_in %08X(%p) len %u\n",
299 *(uint *)data_out, data_out, *(uint *)data_in, data_in, len);
Mingkai Hu799efd92011-04-26 16:31:16 +0800300
Axel Linafcab282013-07-12 17:41:08 +0800301 num_chunks = DIV_ROUND_UP(data_len, max_tran_len);
Mingkai Hu799efd92011-04-26 16:31:16 +0800302 while (num_chunks--) {
303 if (data_in)
304 din = buffer + rx_offset;
305 dout = buffer;
Masahiro Yamadadb204642014-11-07 03:03:31 +0900306 tran_len = min(data_len, (size_t)max_tran_len);
Axel Linafcab282013-07-12 17:41:08 +0800307 num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4);
Mingkai Hu799efd92011-04-26 16:31:16 +0800308 num_bytes = (tran_len + cmd_len) % 4;
309 fsl->data_len = tran_len + cmd_len;
310 spi_cs_activate(slave);
311
312 /* Clear all eSPI events */
313 out_be32(&espi->event , 0xffffffff);
314 /* handle data in 32-bit chunks */
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800315 while (num_blks) {
Mingkai Hu799efd92011-04-26 16:31:16 +0800316 event = in_be32(&espi->event);
317 if (event & ESPI_EV_TNF) {
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800318 fsl_espi_tx(fsl, dout);
Mingkai Hu799efd92011-04-26 16:31:16 +0800319 /* Set up the next iteration */
320 if (len > 4) {
321 len -= 4;
322 dout += 4;
323 }
Mingkai Hu799efd92011-04-26 16:31:16 +0800324 }
325
Mingkai Hu799efd92011-04-26 16:31:16 +0800326 event = in_be32(&espi->event);
327 if (event & ESPI_EV_RNE) {
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800328 rf_cnt = ((event & ESPI_EV_RFCNT_MASK)
329 >> ESPI_EV_RFCNT_SHIFT);
330 if (rf_cnt >= 4)
331 rx_bytes = 4;
332 else if (num_blks == 1 && rf_cnt == num_bytes)
333 rx_bytes = num_bytes;
334 else
335 continue;
336 if (fsl_espi_rx(fsl, din, rx_bytes)
337 == rx_bytes) {
338 num_blks--;
339 if (din)
340 din = (unsigned char *)din
341 + rx_bytes;
Mingkai Hu799efd92011-04-26 16:31:16 +0800342 }
Mingkai Hu799efd92011-04-26 16:31:16 +0800343 }
344 }
345 if (data_in) {
346 memcpy(data_in, buffer + 2 * cmd_len, tran_len);
347 if (*buffer == 0x0b) {
348 data_in += tran_len;
349 data_len -= tran_len;
350 *(int *)buffer += tran_len;
351 }
352 }
353 spi_cs_deactivate(slave);
354 }
355
356 free(buffer);
357 return 0;
358}
359
360int spi_cs_is_valid(unsigned int bus, unsigned int cs)
361{
362 return bus == 0 && cs < ESPI_MAX_CS_NUM;
363}
364
365void spi_cs_activate(struct spi_slave *slave)
366{
367 struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800368 ccsr_espi_t *espi = fsl->espi;
Mingkai Hu799efd92011-04-26 16:31:16 +0800369 unsigned int com = 0;
370 size_t data_len = fsl->data_len;
371
372 com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF));
373 com |= ESPI_COM_CS(slave->cs);
374 com |= ESPI_COM_TRANLEN(data_len - 1);
375 out_be32(&espi->com, com);
376}
377
378void spi_cs_deactivate(struct spi_slave *slave)
379{
Hou Zhiqiang433dd002014-05-21 10:25:10 +0800380 struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
381 ccsr_espi_t *espi = fsl->espi;
Mingkai Hu799efd92011-04-26 16:31:16 +0800382
383 /* clear the RXCNT and TXCNT */
384 out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN));
385 out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN);
386}