| Jagan Teki | 70e882f | 2020-05-26 11:33:44 +0800 | [diff] [blame] | 1 | # |
| 2 | # Phy drivers for Rockchip platforms |
| 3 | # |
| 4 | |
| 5 | menu "Rockchip PHY driver" |
| 6 | |
| Chris Morgan | 486c463 | 2023-03-24 13:53:06 -0500 | [diff] [blame] | 7 | config PHY_ROCKCHIP_INNO_DSIDPHY |
| 8 | bool "Rockchip INNO DSIDPHY Driver" |
| 9 | depends on ARCH_ROCKCHIP |
| 10 | select PHY |
| 11 | select MIPI_DPHY_HELPERS |
| 12 | help |
| 13 | Support for Rockchip MIPI DPHY with Innosilicon IP block. |
| 14 | |
| Jagan Teki | 921e6b4 | 2024-01-17 13:21:48 +0530 | [diff] [blame] | 15 | config PHY_ROCKCHIP_INNO_HDMI |
| 16 | bool "Rockchip INNO HDMI PHY Driver" |
| 17 | depends on ARCH_ROCKCHIP |
| 18 | select PHY |
| 19 | help |
| 20 | Enable this to support the Rockchip Innosilicon HDMI PHY. |
| 21 | |
| Jagan Teki | 70e882f | 2020-05-26 11:33:44 +0800 | [diff] [blame] | 22 | config PHY_ROCKCHIP_INNO_USB2 |
| 23 | bool "Rockchip INNO USB2PHY Driver" |
| 24 | depends on ARCH_ROCKCHIP |
| 25 | select PHY |
| 26 | help |
| 27 | Support for Rockchip USB2.0 PHY with Innosilicon IP block. |
| 28 | |
| Jagan Teki | 0d2d0bf | 2023-02-17 17:28:41 +0530 | [diff] [blame] | 29 | config PHY_ROCKCHIP_NANENG_COMBOPHY |
| 30 | bool "Support Rockchip NANENG combo PHY Driver" |
| 31 | depends on ARCH_ROCKCHIP |
| 32 | select PHY |
| 33 | help |
| 34 | Enable this to support the Rockchip NANENG combo PHY. |
| 35 | |
| Jagan Teki | 9ab7348 | 2020-07-09 23:41:01 +0530 | [diff] [blame] | 36 | config PHY_ROCKCHIP_PCIE |
| 37 | bool "Rockchip PCIe PHY Driver" |
| 38 | depends on ARCH_ROCKCHIP |
| 39 | select PHY |
| 40 | help |
| 41 | Enable this to support the Rockchip PCIe PHY. |
| 42 | |
| Shawn Lin | aa2bd2e | 2021-01-15 18:01:21 +0800 | [diff] [blame] | 43 | config PHY_ROCKCHIP_SNPS_PCIE3 |
| 44 | bool "Rockchip Snps PCIe3 PHY Driver" |
| 45 | depends on PHY && ARCH_ROCKCHIP |
| 46 | help |
| 47 | Support for Rockchip PCIe3 PHY with Synopsys IP block. |
| Shawn Lin | c0649da | 2021-01-15 18:01:22 +0800 | [diff] [blame] | 48 | It could support PCIe Gen3 single root complex, and could |
| 49 | also be able splited into multiple combinations of lanes. |
| 50 | |
| Frank Wang | 9354394 | 2023-05-29 13:01:33 +0300 | [diff] [blame] | 51 | config PHY_ROCKCHIP_USBDP |
| 52 | tristate "Rockchip USBDP COMBO PHY Driver" |
| 53 | depends on ARCH_ROCKCHIP |
| 54 | select PHY |
| 55 | help |
| 56 | Enable this to support the Rockchip USB3.0/DP |
| 57 | combo PHY with Samsung IP block. |
| Shawn Lin | aa2bd2e | 2021-01-15 18:01:21 +0800 | [diff] [blame] | 58 | |
| Jagan Teki | 573ba56 | 2020-05-26 11:33:45 +0800 | [diff] [blame] | 59 | config PHY_ROCKCHIP_TYPEC |
| 60 | bool "Rockchip TYPEC PHY Driver" |
| 61 | depends on ARCH_ROCKCHIP |
| 62 | select PHY |
| 63 | help |
| 64 | Enable this to support the Rockchip USB TYPEC PHY. |
| 65 | |
| Jagan Teki | 70e882f | 2020-05-26 11:33:44 +0800 | [diff] [blame] | 66 | endmenu |