Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2002 |
| 4 | * ARIO Data Networks, Inc. dchiu@ariodata.com |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 5 | * |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 6 | * modified for DS164x: |
| 7 | * The LEOX team <team@leox.org>, http://www.leox.org |
| 8 | * |
| 9 | * Based on MontaVista DS1743 code and U-Boot mc146818 code |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | /* |
| 13 | * Date & Time support for the DS164x RTC |
| 14 | */ |
| 15 | |
| 16 | /* #define RTC_DEBUG */ |
| 17 | |
| 18 | #include <common.h> |
| 19 | #include <command.h> |
| 20 | #include <rtc.h> |
| 21 | |
| 22 | |
Michal Simek | c3e6c55 | 2008-07-14 19:45:37 +0200 | [diff] [blame] | 23 | #if defined(CONFIG_CMD_DATE) |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 24 | |
| 25 | static uchar rtc_read(unsigned int addr ); |
| 26 | static void rtc_write(unsigned int addr, uchar val); |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 27 | |
| 28 | #define RTC_EPOCH 2000 /* century */ |
| 29 | |
| 30 | /* |
| 31 | * DS164x registers layout |
| 32 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 33 | #define RTC_BASE ( CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE ) |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 34 | |
| 35 | #define RTC_YEAR ( RTC_BASE + 0x07 ) |
| 36 | #define RTC_MONTH ( RTC_BASE + 0x06 ) |
| 37 | #define RTC_DAY_OF_MONTH ( RTC_BASE + 0x05 ) |
| 38 | #define RTC_DAY_OF_WEEK ( RTC_BASE + 0x04 ) |
| 39 | #define RTC_HOURS ( RTC_BASE + 0x03 ) |
| 40 | #define RTC_MINUTES ( RTC_BASE + 0x02 ) |
| 41 | #define RTC_SECONDS ( RTC_BASE + 0x01 ) |
| 42 | #define RTC_CONTROL ( RTC_BASE + 0x00 ) |
| 43 | |
| 44 | #define RTC_CONTROLA RTC_CONTROL /* W=bit6, R=bit5 */ |
| 45 | #define RTC_CA_WRITE 0x80 |
| 46 | #define RTC_CA_READ 0x40 |
| 47 | #define RTC_CONTROLB RTC_SECONDS /* OSC=bit7 */ |
| 48 | #define RTC_CB_OSC_DISABLE 0x80 |
| 49 | #define RTC_CONTROLC RTC_DAY_OF_WEEK /* FT=bit6 */ |
| 50 | #define RTC_CC_FREQ_TEST 0x40 |
| 51 | |
| 52 | /* ------------------------------------------------------------------------- */ |
| 53 | |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 54 | int rtc_get( struct rtc_time *tmp ) |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 55 | { |
| 56 | uchar sec, min, hour; |
| 57 | uchar mday, wday, mon, year; |
| 58 | |
| 59 | uchar reg_a; |
| 60 | |
| 61 | reg_a = rtc_read( RTC_CONTROLA ); |
| 62 | /* lock clock registers for read */ |
| 63 | rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_READ )); |
| 64 | |
| 65 | sec = rtc_read( RTC_SECONDS ); |
| 66 | min = rtc_read( RTC_MINUTES ); |
| 67 | hour = rtc_read( RTC_HOURS ); |
| 68 | mday = rtc_read( RTC_DAY_OF_MONTH ); |
| 69 | wday = rtc_read( RTC_DAY_OF_WEEK ); |
| 70 | mon = rtc_read( RTC_MONTH ); |
| 71 | year = rtc_read( RTC_YEAR ); |
| 72 | |
| 73 | /* unlock clock registers after read */ |
| 74 | rtc_write( RTC_CONTROLA, ( reg_a & ~RTC_CA_READ )); |
| 75 | |
| 76 | #ifdef RTC_DEBUG |
| 77 | printf( "Get RTC year: %02x mon: %02x mday: %02x wday: %02x " |
| 78 | "hr: %02x min: %02x sec: %02x\n", |
| 79 | year, mon, mday, wday, |
| 80 | hour, min, sec ); |
| 81 | #endif |
| 82 | tmp->tm_sec = bcd2bin( sec & 0x7F ); |
| 83 | tmp->tm_min = bcd2bin( min & 0x7F ); |
| 84 | tmp->tm_hour = bcd2bin( hour & 0x3F ); |
| 85 | tmp->tm_mday = bcd2bin( mday & 0x3F ); |
| 86 | tmp->tm_mon = bcd2bin( mon & 0x1F ); |
| 87 | tmp->tm_wday = bcd2bin( wday & 0x07 ); |
| 88 | |
| 89 | /* glue year in century (2000) */ |
| 90 | tmp->tm_year = bcd2bin( year ) + RTC_EPOCH; |
| 91 | |
| 92 | tmp->tm_yday = 0; |
| 93 | tmp->tm_isdst= 0; |
| 94 | #ifdef RTC_DEBUG |
| 95 | printf( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
| 96 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, |
| 97 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec ); |
| 98 | #endif |
Yuri Tikhonov | 9bacd94 | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 99 | |
| 100 | return 0; |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 101 | } |
| 102 | |
Jean-Christophe PLAGNIOL-VILLARD | 97a2e10 | 2008-09-01 23:06:23 +0200 | [diff] [blame] | 103 | int rtc_set( struct rtc_time *tmp ) |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 104 | { |
| 105 | uchar reg_a; |
| 106 | |
| 107 | #ifdef RTC_DEBUG |
| 108 | printf( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
| 109 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, |
| 110 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); |
| 111 | #endif |
| 112 | /* lock clock registers for write */ |
| 113 | reg_a = rtc_read( RTC_CONTROLA ); |
| 114 | rtc_write( RTC_CONTROLA, ( reg_a | RTC_CA_WRITE )); |
| 115 | |
| 116 | rtc_write( RTC_MONTH, bin2bcd( tmp->tm_mon )); |
| 117 | |
| 118 | rtc_write( RTC_DAY_OF_WEEK, bin2bcd( tmp->tm_wday )); |
| 119 | rtc_write( RTC_DAY_OF_MONTH, bin2bcd( tmp->tm_mday )); |
| 120 | rtc_write( RTC_HOURS, bin2bcd( tmp->tm_hour )); |
| 121 | rtc_write( RTC_MINUTES, bin2bcd( tmp->tm_min )); |
| 122 | rtc_write( RTC_SECONDS, bin2bcd( tmp->tm_sec )); |
| 123 | |
| 124 | /* break year in century */ |
| 125 | rtc_write( RTC_YEAR, bin2bcd( tmp->tm_year % 100 )); |
| 126 | |
| 127 | /* unlock clock registers after read */ |
| 128 | rtc_write( RTC_CONTROLA, ( reg_a & ~RTC_CA_WRITE )); |
Jean-Christophe PLAGNIOL-VILLARD | 97a2e10 | 2008-09-01 23:06:23 +0200 | [diff] [blame] | 129 | |
| 130 | return 0; |
wdenk | ef5fe75 | 2003-03-12 10:41:04 +0000 | [diff] [blame] | 131 | } |
| 132 | |
| 133 | void rtc_reset (void) |
| 134 | { |
| 135 | uchar reg_a, reg_b; |
| 136 | |
| 137 | reg_a = rtc_read( RTC_CONTROLA ); |
| 138 | reg_b = rtc_read( RTC_CONTROLB ); |
| 139 | |
| 140 | if ( reg_b & RTC_CB_OSC_DISABLE ) |
| 141 | { |
| 142 | printf( "real-time-clock was stopped. Now starting...\n" ); |
| 143 | reg_a |= RTC_CA_WRITE; |
| 144 | reg_b &= ~RTC_CB_OSC_DISABLE; |
| 145 | |
| 146 | rtc_write( RTC_CONTROLA, reg_a ); |
| 147 | rtc_write( RTC_CONTROLB, reg_b ); |
| 148 | } |
| 149 | |
| 150 | /* make sure read/write clock register bits are cleared */ |
| 151 | reg_a &= ~( RTC_CA_WRITE | RTC_CA_READ ); |
| 152 | rtc_write( RTC_CONTROLA, reg_a ); |
| 153 | } |
| 154 | |
| 155 | /* ------------------------------------------------------------------------- */ |
| 156 | |
| 157 | static uchar rtc_read( unsigned int addr ) |
| 158 | { |
| 159 | uchar val = *(volatile unsigned char*)(addr); |
| 160 | |
| 161 | #ifdef RTC_DEBUG |
| 162 | printf( "rtc_read: %x:%x\n", addr, val ); |
| 163 | #endif |
| 164 | return( val ); |
| 165 | } |
| 166 | |
| 167 | static void rtc_write( unsigned int addr, uchar val ) |
| 168 | { |
| 169 | #ifdef RTC_DEBUG |
| 170 | printf( "rtc_write: %x:%x\n", addr, val ); |
| 171 | #endif |
| 172 | *(volatile unsigned char*)(addr) = val; |
| 173 | } |
| 174 | |
Jon Loeliger | 07efe2a | 2007-07-10 10:27:39 -0500 | [diff] [blame] | 175 | #endif |