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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Masahiro Yamada96a42ed2015-01-13 12:44:36 +09002/*
Masahiro Yamadafa1f73f2016-07-19 21:56:13 +09003 * Copyright (C) 2014 Panasonic Corporation
4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada96a42ed2015-01-13 12:44:36 +09006 */
7
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +09008#include <linux/delay.h>
9#include <linux/errno.h>
Masahiro Yamada663a23f2015-05-29 17:30:00 +090010#include <linux/io.h>
Masahiro Yamada78752d62016-03-24 22:32:40 +090011#include <linux/sizes.h>
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090012#include <linux/types.h>
13#include <dm.h>
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090014#include <fdtdec.h>
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090015#include <i2c.h>
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090016
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090017struct uniphier_i2c_regs {
18 u32 dtrm; /* data transmission */
19#define I2C_DTRM_STA (1 << 10)
20#define I2C_DTRM_STO (1 << 9)
21#define I2C_DTRM_NACK (1 << 8)
22#define I2C_DTRM_RD (1 << 0)
23 u32 drec; /* data reception */
24#define I2C_DREC_STS (1 << 12)
25#define I2C_DREC_LRB (1 << 11)
26#define I2C_DREC_LAB (1 << 9)
27 u32 myad; /* slave address */
28 u32 clk; /* clock frequency control */
29 u32 brst; /* bus reset */
30#define I2C_BRST_FOEN (1 << 1)
31#define I2C_BRST_BRST (1 << 0)
32 u32 hold; /* hold time control */
33 u32 bsts; /* bus status monitor */
34 u32 noise; /* noise filter control */
35 u32 setup; /* setup time control */
36};
37
38#define IOBUS_FREQ 100000000
39
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090040struct uniphier_i2c_priv {
41 struct udevice *dev;
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090042 struct uniphier_i2c_regs __iomem *regs; /* register base */
43 unsigned long input_clk; /* master clock (Hz) */
44 unsigned long wait_us; /* wait for every byte transfer (us) */
45};
46
47static int uniphier_i2c_probe(struct udevice *dev)
48{
49 fdt_addr_t addr;
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090050 struct uniphier_i2c_priv *priv = dev_get_priv(dev);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090051
Simon Glassba1dea42017-05-17 17:18:05 -060052 addr = devfdt_get_addr(dev);
Masahiro Yamada78752d62016-03-24 22:32:40 +090053 if (addr == FDT_ADDR_T_NONE)
54 return -EINVAL;
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090055
Masahiro Yamadafa1f73f2016-07-19 21:56:13 +090056 priv->regs = devm_ioremap(dev, addr, SZ_64);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090057 if (!priv->regs)
58 return -ENOMEM;
59
60 priv->input_clk = IOBUS_FREQ;
61
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090062 priv->dev = dev;
63
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090064 /* deassert reset */
65 writel(0x3, &priv->regs->brst);
66
67 return 0;
68}
69
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090070static int send_and_recv_byte(struct uniphier_i2c_priv *priv, u32 dtrm)
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090071{
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090072 writel(dtrm, &priv->regs->dtrm);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090073
74 /*
75 * This controller only provides interruption to inform the completion
76 * of each byte transfer. (No status register to poll it.)
77 * Unfortunately, U-Boot does not have a good support of interrupt.
78 * Wait for a while.
79 */
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090080 udelay(priv->wait_us);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090081
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090082 return readl(&priv->regs->drec);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090083}
84
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090085static int send_byte(struct uniphier_i2c_priv *priv, u32 dtrm, bool *stop)
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090086{
87 int ret = 0;
88 u32 drec;
89
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090090 drec = send_and_recv_byte(priv, dtrm);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090091
92 if (drec & I2C_DREC_LAB) {
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090093 dev_dbg(priv->dev, "uniphier_i2c: bus arbitration failed\n");
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090094 *stop = false;
95 ret = -EREMOTEIO;
96 }
97 if (drec & I2C_DREC_LRB) {
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +090098 dev_dbg(priv->dev, "uniphier_i2c: slave did not return ACK\n");
Masahiro Yamada96a42ed2015-01-13 12:44:36 +090099 ret = -EREMOTEIO;
100 }
101 return ret;
102}
103
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900104static int uniphier_i2c_transmit(struct uniphier_i2c_priv *priv, uint addr,
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900105 uint len, const u8 *buf, bool *stop)
106{
107 int ret;
108
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900109 dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900110
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900111 ret = send_byte(priv, I2C_DTRM_STA | I2C_DTRM_NACK | addr << 1, stop);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900112 if (ret < 0)
113 goto fail;
114
115 while (len--) {
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900116 ret = send_byte(priv, I2C_DTRM_NACK | *buf++, stop);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900117 if (ret < 0)
118 goto fail;
119 }
120
121fail:
122 if (*stop)
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900123 writel(I2C_DTRM_STO | I2C_DTRM_NACK, &priv->regs->dtrm);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900124
125 return ret;
126}
127
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900128static int uniphier_i2c_receive(struct uniphier_i2c_priv *priv, uint addr,
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900129 uint len, u8 *buf, bool *stop)
130{
131 int ret;
132
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900133 dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900134
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900135 ret = send_byte(priv, I2C_DTRM_STA | I2C_DTRM_NACK |
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900136 I2C_DTRM_RD | addr << 1, stop);
137 if (ret < 0)
138 goto fail;
139
140 while (len--)
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900141 *buf++ = send_and_recv_byte(priv, len ? 0 : I2C_DTRM_NACK);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900142
143fail:
144 if (*stop)
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900145 writel(I2C_DTRM_STO | I2C_DTRM_NACK, &priv->regs->dtrm);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900146
147 return ret;
148}
149
150static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
151 int nmsgs)
152{
153 int ret = 0;
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900154 struct uniphier_i2c_priv *priv = dev_get_priv(bus);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900155 bool stop;
156
157 for (; nmsgs > 0; nmsgs--, msg++) {
158 /* If next message is read, skip the stop condition */
159 stop = nmsgs > 1 && msg[1].flags & I2C_M_RD ? false : true;
160
161 if (msg->flags & I2C_M_RD)
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900162 ret = uniphier_i2c_receive(priv, msg->addr, msg->len,
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900163 msg->buf, &stop);
164 else
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900165 ret = uniphier_i2c_transmit(priv, msg->addr, msg->len,
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900166 msg->buf, &stop);
167
168 if (ret < 0)
169 break;
170 }
171
172 return ret;
173}
174
175static int uniphier_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
176{
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900177 struct uniphier_i2c_priv *priv = dev_get_priv(bus);
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900178
179 /* max supported frequency is 400 kHz */
180 if (speed > 400000)
181 return -EINVAL;
182
183 /* bus reset: make sure the bus is idle when change the frequency */
184 writel(0x1, &priv->regs->brst);
185
186 writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed),
187 &priv->regs->clk);
188
189 writel(0x3, &priv->regs->brst);
190
191 /*
192 * Theoretically, each byte can be transferred in
193 * 1000000 * 9 / speed usec. For safety, wait more than double.
194 */
195 priv->wait_us = 20000000 / speed;
196
197 return 0;
198}
199
200
201static const struct dm_i2c_ops uniphier_i2c_ops = {
202 .xfer = uniphier_i2c_xfer,
203 .set_bus_speed = uniphier_i2c_set_bus_speed,
204};
205
206static const struct udevice_id uniphier_i2c_of_match[] = {
Masahiro Yamadad5f83a42015-03-11 15:54:46 +0900207 { .compatible = "socionext,uniphier-i2c" },
208 { /* sentinel */ }
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900209};
210
211U_BOOT_DRIVER(uniphier_i2c) = {
212 .name = "uniphier-i2c",
213 .id = UCLASS_I2C,
214 .of_match = uniphier_i2c_of_match,
215 .probe = uniphier_i2c_probe,
Masahiro Yamadaec0aa7c2017-10-13 19:21:57 +0900216 .priv_auto_alloc_size = sizeof(struct uniphier_i2c_priv),
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900217 .ops = &uniphier_i2c_ops,
218};