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git01.mediatek.com / filogic / uboot / 19aac97894ed08ce873988ce36ca6de3f67ca017 / . / board / nvidia / dalmore / pinmux-config-dalmore.h
blob: 3ef6f4eaf6f39bad36cc11f6a97240cd442f0df4 [file] [log] [blame]
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]1/*
2 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#ifndef _PINMUX_CONFIG_DALMORE_H_
18#define _PINMUX_CONFIG_DALMORE_H_
19
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]20#define DEFAULT_PINMUX(_pingroup, _mux, _pull, _tri, _io) \
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]21 { \
22 .pingroup = PINGRP_##_pingroup, \
23 .func = PMUX_FUNC_##_mux, \
24 .pull = PMUX_PULL_##_pull, \
25 .tristate = PMUX_TRI_##_tri, \
26 .io = PMUX_PIN_##_io, \
27 .lock = PMUX_PIN_LOCK_DEFAULT, \
28 .od = PMUX_PIN_OD_DEFAULT, \
29 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
30 }
31
32#define I2C_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
33 { \
34 .pingroup = PINGRP_##_pingroup, \
35 .func = PMUX_FUNC_##_mux, \
36 .pull = PMUX_PULL_##_pull, \
37 .tristate = PMUX_TRI_##_tri, \
38 .io = PMUX_PIN_##_io, \
39 .lock = PMUX_PIN_LOCK_##_lock, \
40 .od = PMUX_PIN_OD_##_od, \
41 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
42 }
43
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]44#define DDC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]45 { \
46 .pingroup = PINGRP_##_pingroup, \
47 .func = PMUX_FUNC_##_mux, \
48 .pull = PMUX_PULL_##_pull, \
49 .tristate = PMUX_TRI_##_tri, \
50 .io = PMUX_PIN_##_io, \
51 .lock = PMUX_PIN_LOCK_##_lock, \
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]52 .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \
53 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
54 }
55
56#define VI_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _ioreset) \
57 { \
58 .pingroup = PINGRP_##_pingroup, \
59 .func = PMUX_FUNC_##_mux, \
60 .pull = PMUX_PULL_##_pull, \
61 .tristate = PMUX_TRI_##_tri, \
62 .io = PMUX_PIN_##_io, \
63 .lock = PMUX_PIN_LOCK_##_lock, \
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]64 .od = PMUX_PIN_OD_DEFAULT, \
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]65 .ioreset = PMUX_PIN_IO_RESET_##_ioreset \
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]66 }
67
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]68#define CEC_PINMUX(_pingroup, _mux, _pull, _tri, _io, _lock, _od) \
69 { \
70 .pingroup = PINGRP_##_pingroup, \
71 .func = PMUX_FUNC_##_mux, \
72 .pull = PMUX_PULL_##_pull, \
73 .tristate = PMUX_TRI_##_tri, \
74 .io = PMUX_PIN_##_io, \
75 .lock = PMUX_PIN_LOCK_##_lock, \
76 .od = PMUX_PIN_OD_##_od, \
77 .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
78 }
79
80#define USB_PINMUX CEC_PINMUX
81
Tom Warrene6194612013-03-11 16:43:49 -0700[diff] [blame]82#define DEFAULT_PADCFG(_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
83 { \
84 .padgrp = PDRIVE_PINGROUP_##_padgrp, \
85 .slwf = _slwf, \
86 .slwr = _slwr, \
87 .drvup = _drvup, \
88 .drvdn = _drvdn, \
89 .lpmd = PGRP_LPMD_##_lpmd, \
90 .schmt = PGRP_SCHMT_##_schmt, \
91 .hsm = PGRP_HSM_##_hsm, \
92 }
93
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]94static struct pingroup_config tegra114_pinmux_common[] = {
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]95 /* EXTPERIPH1 pinmux */
96 DEFAULT_PINMUX(CLK1_OUT, EXTPERIPH1, NORMAL, NORMAL, OUTPUT),
97
98 /* I2S0 pinmux */
99 DEFAULT_PINMUX(DAP1_DIN, I2S0, NORMAL, TRISTATE, INPUT),
100 DEFAULT_PINMUX(DAP1_DOUT, I2S0, NORMAL, NORMAL, INPUT),
101 DEFAULT_PINMUX(DAP1_FS, I2S0, NORMAL, NORMAL, INPUT),
102 DEFAULT_PINMUX(DAP1_SCLK, I2S0, NORMAL, NORMAL, INPUT),
103
104 /* I2S1 pinmux */
105 DEFAULT_PINMUX(DAP2_DIN, I2S1, NORMAL, TRISTATE, INPUT),
106 DEFAULT_PINMUX(DAP2_DOUT, I2S1, NORMAL, NORMAL, INPUT),
107 DEFAULT_PINMUX(DAP2_FS, I2S1, NORMAL, NORMAL, INPUT),
108 DEFAULT_PINMUX(DAP2_SCLK, I2S1, NORMAL, NORMAL, INPUT),
109
110 /* I2S3 pinmux */
111 DEFAULT_PINMUX(DAP4_DIN, I2S3, NORMAL, NORMAL, INPUT),
112 DEFAULT_PINMUX(DAP4_DOUT, I2S3, NORMAL, NORMAL, INPUT),
113 DEFAULT_PINMUX(DAP4_FS, I2S3, NORMAL, NORMAL, INPUT),
114 DEFAULT_PINMUX(DAP4_SCLK, I2S3, NORMAL, NORMAL, INPUT),
115
116 /* CLDVFS pinmux */
117 DEFAULT_PINMUX(DVFS_PWM, CLDVFS, NORMAL, NORMAL, OUTPUT),
118 DEFAULT_PINMUX(DVFS_CLK, CLDVFS, NORMAL, NORMAL, OUTPUT),
119
120 /* ULPI pinmux */
121 DEFAULT_PINMUX(ULPI_CLK, ULPI, NORMAL, NORMAL, INPUT),
122 DEFAULT_PINMUX(ULPI_DATA0, ULPI, NORMAL, NORMAL, INPUT),
123 DEFAULT_PINMUX(ULPI_DATA1, ULPI, NORMAL, NORMAL, INPUT),
124 DEFAULT_PINMUX(ULPI_DATA2, ULPI, NORMAL, NORMAL, INPUT),
125 DEFAULT_PINMUX(ULPI_DATA3, ULPI, NORMAL, NORMAL, INPUT),
126 DEFAULT_PINMUX(ULPI_DATA4, ULPI, NORMAL, NORMAL, INPUT),
127 DEFAULT_PINMUX(ULPI_DATA5, ULPI, NORMAL, NORMAL, INPUT),
128 DEFAULT_PINMUX(ULPI_DATA6, ULPI, NORMAL, NORMAL, INPUT),
129 DEFAULT_PINMUX(ULPI_DATA7, ULPI, NORMAL, NORMAL, INPUT),
130 DEFAULT_PINMUX(ULPI_DIR, ULPI, NORMAL, TRISTATE, INPUT),
131 DEFAULT_PINMUX(ULPI_NXT, ULPI, NORMAL, TRISTATE, INPUT),
132 DEFAULT_PINMUX(ULPI_STP, ULPI, NORMAL, NORMAL, OUTPUT),
133
134 /* I2C3 pinmux */
Tom Warren0962b4b2013-03-13 15:40:33 -0700[diff] [blame]135 I2C_PINMUX(CAM_I2C_SCL, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
136 I2C_PINMUX(CAM_I2C_SDA, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]137
138 /* VI pinmux */
139 VI_PINMUX(CAM_MCLK, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
140
141 /* VI_ALT1 pinmux */
142 VI_PINMUX(GPIO_PBB0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
143
144 /* VGP4 pinmux */
145 VI_PINMUX(GPIO_PBB4, VGP4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
146
147 /* I2C2 pinmux */
Tom Warren0962b4b2013-03-13 15:40:33 -0700[diff] [blame]148 I2C_PINMUX(GEN2_I2C_SCL, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
149 I2C_PINMUX(GEN2_I2C_SDA, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]150
151 /* UARTD pinmux */
152 DEFAULT_PINMUX(GMI_A16, UARTD, NORMAL, NORMAL, OUTPUT),
153 DEFAULT_PINMUX(GMI_A17, UARTD, NORMAL, TRISTATE, INPUT),
154 DEFAULT_PINMUX(GMI_A18, UARTD, NORMAL, TRISTATE, INPUT),
155 DEFAULT_PINMUX(GMI_A19, UARTD, NORMAL, NORMAL, OUTPUT),
156
157 /* SPI4 pinmux */
158 DEFAULT_PINMUX(GMI_AD5, SPI4, NORMAL, NORMAL, INPUT),
159 DEFAULT_PINMUX(GMI_AD6, SPI4, UP, NORMAL, INPUT),
160 DEFAULT_PINMUX(GMI_AD7, SPI4, UP, NORMAL, INPUT),
161 DEFAULT_PINMUX(GMI_AD12, RSVD1, NORMAL, NORMAL, OUTPUT),
162 DEFAULT_PINMUX(GMI_CS6_N, SPI4, NORMAL, NORMAL, INPUT),
163 DEFAULT_PINMUX(GMI_WR_N, SPI4, NORMAL, NORMAL, INPUT),
164
165 /* PWM1 pinmux */
166 DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT),
167
168 /* SOC pinmux */
169 DEFAULT_PINMUX(GMI_CS1_N, SOC, NORMAL, TRISTATE, INPUT),
170 DEFAULT_PINMUX(GMI_OE_N, SOC, NORMAL, TRISTATE, INPUT),
171
172 /* EXTPERIPH2 pinmux */
173 DEFAULT_PINMUX(CLK2_OUT, EXTPERIPH2, NORMAL, NORMAL, OUTPUT),
174
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]175 /* SDMMC1 pinmux */
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]176 DEFAULT_PINMUX(SDMMC1_CLK, SDMMC1, NORMAL, NORMAL, INPUT),
177 DEFAULT_PINMUX(SDMMC1_CMD, SDMMC1, UP, NORMAL, INPUT),
178 DEFAULT_PINMUX(SDMMC1_DAT0, SDMMC1, UP, NORMAL, INPUT),
179 DEFAULT_PINMUX(SDMMC1_DAT1, SDMMC1, UP, NORMAL, INPUT),
180 DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, UP, NORMAL, INPUT),
181 DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, UP, NORMAL, INPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]182
183 /* SDMMC3 pinmux */
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]184 DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT),
185 DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, UP, NORMAL, INPUT),
186 DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, UP, NORMAL, INPUT),
187 DEFAULT_PINMUX(SDMMC3_DAT1, SDMMC3, UP, NORMAL, INPUT),
188 DEFAULT_PINMUX(SDMMC3_DAT2, SDMMC3, UP, NORMAL, INPUT),
189 DEFAULT_PINMUX(SDMMC3_DAT3, SDMMC3, UP, NORMAL, INPUT),
190 DEFAULT_PINMUX(SDMMC3_CLK_LB_IN, SDMMC3, UP, TRISTATE, INPUT),
191 DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT, SDMMC3, DOWN, NORMAL, INPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]192
193 /* SDMMC4 pinmux */
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]194 DEFAULT_PINMUX(SDMMC4_CLK, SDMMC4, NORMAL, NORMAL, INPUT),
195 DEFAULT_PINMUX(SDMMC4_CMD, SDMMC4, UP, NORMAL, INPUT),
196 DEFAULT_PINMUX(SDMMC4_DAT0, SDMMC4, UP, NORMAL, INPUT),
197 DEFAULT_PINMUX(SDMMC4_DAT1, SDMMC4, UP, NORMAL, INPUT),
198 DEFAULT_PINMUX(SDMMC4_DAT2, SDMMC4, UP, NORMAL, INPUT),
199 DEFAULT_PINMUX(SDMMC4_DAT3, SDMMC4, UP, NORMAL, INPUT),
200 DEFAULT_PINMUX(SDMMC4_DAT4, SDMMC4, UP, NORMAL, INPUT),
201 DEFAULT_PINMUX(SDMMC4_DAT5, SDMMC4, UP, NORMAL, INPUT),
202 DEFAULT_PINMUX(SDMMC4_DAT6, SDMMC4, UP, NORMAL, INPUT),
203 DEFAULT_PINMUX(SDMMC4_DAT7, SDMMC4, UP, NORMAL, INPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]204
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]205 /* BLINK pinmux */
206 DEFAULT_PINMUX(CLK_32K_OUT, BLINK, NORMAL, NORMAL, OUTPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]207
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]208 /* KBC pinmux */
209 DEFAULT_PINMUX(KB_COL0, KBC, UP, NORMAL, INPUT),
210 DEFAULT_PINMUX(KB_COL1, KBC, UP, NORMAL, INPUT),
211 DEFAULT_PINMUX(KB_COL2, KBC, UP, NORMAL, INPUT),
212 DEFAULT_PINMUX(KB_ROW0, KBC, UP, NORMAL, INPUT),
213 DEFAULT_PINMUX(KB_ROW1, KBC, UP, NORMAL, INPUT),
214 DEFAULT_PINMUX(KB_ROW2, KBC, UP, NORMAL, INPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]215
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]216 /*Audio Codec*/
217 DEFAULT_PINMUX(DAP3_DIN, RSVD1, NORMAL, TRISTATE, OUTPUT),
218 DEFAULT_PINMUX(DAP3_SCLK, RSVD1, NORMAL, TRISTATE, OUTPUT),
219 DEFAULT_PINMUX(GPIO_PV0, RSVD1, NORMAL, TRISTATE, OUTPUT),
220 DEFAULT_PINMUX(KB_ROW7, RSVD1, UP, NORMAL, INPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]221
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]222 /* UARTA pinmux */
223 DEFAULT_PINMUX(KB_ROW10, UARTA, NORMAL, TRISTATE, INPUT),
224 DEFAULT_PINMUX(KB_ROW9, UARTA, NORMAL, NORMAL, OUTPUT),
225
226 /* I2CPWR pinmux (I2C5) */
Tom Warren0962b4b2013-03-13 15:40:33 -0700[diff] [blame]227 I2C_PINMUX(PWR_I2C_SCL, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
228 I2C_PINMUX(PWR_I2C_SDA, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]229
230 /* SYSCLK pinmux */
231 DEFAULT_PINMUX(SYS_CLK_REQ, SYSCLK, NORMAL, NORMAL, OUTPUT),
232
233 /* RTCK pinmux */
234 DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, INPUT),
235
236 /* CLK pinmux */
237 DEFAULT_PINMUX(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT),
238
239 /* PWRON pinmux */
240 DEFAULT_PINMUX(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT),
241
242 /* CPU pinmux */
243 DEFAULT_PINMUX(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT),
244
245 /* PMI pinmux */
246 DEFAULT_PINMUX(PWR_INT_N, PMI, NORMAL, TRISTATE, INPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]247
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]248 /* RESET_OUT_N pinmux */
249 DEFAULT_PINMUX(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, OUTPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]250
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]251 /* EXTPERIPH3 pinmux */
252 DEFAULT_PINMUX(CLK3_OUT, EXTPERIPH3, NORMAL, NORMAL, OUTPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]253
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]254 /* I2C1 pinmux */
Tom Warren0962b4b2013-03-13 15:40:33 -0700[diff] [blame]255 I2C_PINMUX(GEN1_I2C_SCL, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
256 I2C_PINMUX(GEN1_I2C_SDA, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]257
258 /* UARTB pinmux */
259 DEFAULT_PINMUX(UART2_CTS_N, UARTB, NORMAL, TRISTATE, INPUT),
260 DEFAULT_PINMUX(UART2_RTS_N, UARTB, NORMAL, NORMAL, OUTPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]261
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]262 /* IRDA pinmux */
263 DEFAULT_PINMUX(UART2_RXD, UARTB, NORMAL, TRISTATE, INPUT),
264 DEFAULT_PINMUX(UART2_TXD, UARTB, NORMAL, NORMAL, OUTPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]265
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]266 /* UARTC pinmux */
267 DEFAULT_PINMUX(UART3_CTS_N, UARTC, NORMAL, TRISTATE, INPUT),
268 DEFAULT_PINMUX(UART3_RTS_N, UARTC, NORMAL, NORMAL, OUTPUT),
269 DEFAULT_PINMUX(UART3_RXD, UARTC, NORMAL, TRISTATE, INPUT),
270 DEFAULT_PINMUX(UART3_TXD, UARTC, NORMAL, NORMAL, OUTPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]271
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]272 /* OWR pinmux */
273 DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]274
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]275 /* CEC pinmux */
Tom Warren0962b4b2013-03-13 15:40:33 -0700[diff] [blame]276 CEC_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]277
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]278 /* I2C4 pinmux */
Tom Warren0962b4b2013-03-13 15:40:33 -0700[diff] [blame]279 DDC_PINMUX(DDC_SCL, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
280 DDC_PINMUX(DDC_SDA, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]281
282 /* USB pinmux */
Tom Warren0962b4b2013-03-13 15:40:33 -0700[diff] [blame]283 USB_PINMUX(USB_VBUS_EN0, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]284
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]285 /* nct */
286 DEFAULT_PINMUX(GPIO_X6_AUD, SPI6, UP, TRISTATE, INPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]287};
288
289static struct pingroup_config unused_pins_lowpower[] = {
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]290 DEFAULT_PINMUX(CLK1_REQ, RSVD3, DOWN, TRISTATE, OUTPUT),
291 DEFAULT_PINMUX(USB_VBUS_EN1, RSVD3, DOWN, TRISTATE, OUTPUT),
Tom Warren7a3fa012013-01-28 13:32:13 +0000[diff] [blame]292};
293
Tom Warren8495b222013-03-01 14:38:20 -0700[diff] [blame]294/* Initially setting all used GPIO's to non-TRISTATE */
295static struct pingroup_config tegra114_pinmux_set_nontristate[] = {
296 DEFAULT_PINMUX(GPIO_X4_AUD, RSVD1, DOWN, NORMAL, OUTPUT),
297 DEFAULT_PINMUX(GPIO_X5_AUD, RSVD1, UP, NORMAL, INPUT),
298 DEFAULT_PINMUX(GPIO_X6_AUD, RSVD3, UP, NORMAL, INPUT),
299 DEFAULT_PINMUX(GPIO_X7_AUD, RSVD1, DOWN, NORMAL, OUTPUT),
300 DEFAULT_PINMUX(GPIO_W2_AUD, RSVD1, UP, NORMAL, INPUT),
301 DEFAULT_PINMUX(GPIO_W3_AUD, SPI6, UP, NORMAL, INPUT),
302 DEFAULT_PINMUX(GPIO_X1_AUD, RSVD3, DOWN, NORMAL, INPUT),
303 DEFAULT_PINMUX(GPIO_X3_AUD, RSVD3, UP, NORMAL, INPUT),
304
305 DEFAULT_PINMUX(DAP3_FS, I2S2, DOWN, NORMAL, OUTPUT),
306 DEFAULT_PINMUX(DAP3_DIN, I2S2, DOWN, NORMAL, OUTPUT),
307 DEFAULT_PINMUX(DAP3_DOUT, I2S2, DOWN, NORMAL, OUTPUT),
308 DEFAULT_PINMUX(DAP3_SCLK, I2S2, DOWN, NORMAL, OUTPUT),
309 DEFAULT_PINMUX(GPIO_PV0, RSVD3, NORMAL, NORMAL, INPUT),
310 DEFAULT_PINMUX(GPIO_PV1, RSVD1, NORMAL, NORMAL, INPUT),
311
312 DEFAULT_PINMUX(GPIO_PBB3, RSVD3, DOWN, NORMAL, OUTPUT),
313 DEFAULT_PINMUX(GPIO_PBB5, RSVD3, DOWN, NORMAL, OUTPUT),
314 DEFAULT_PINMUX(GPIO_PBB6, RSVD3, DOWN, NORMAL, OUTPUT),
315 DEFAULT_PINMUX(GPIO_PBB7, RSVD3, DOWN, NORMAL, OUTPUT),
316 DEFAULT_PINMUX(GPIO_PCC1, RSVD3, DOWN, NORMAL, INPUT),
317 DEFAULT_PINMUX(GPIO_PCC2, RSVD3, DOWN, NORMAL, INPUT),
318
319 DEFAULT_PINMUX(GMI_AD0, GMI, NORMAL, NORMAL, OUTPUT),
320 DEFAULT_PINMUX(GMI_AD1, GMI, NORMAL, NORMAL, OUTPUT),
321 DEFAULT_PINMUX(GMI_AD10, GMI, DOWN, NORMAL, OUTPUT),
322 DEFAULT_PINMUX(GMI_AD11, GMI, DOWN, NORMAL, OUTPUT),
323 DEFAULT_PINMUX(GMI_AD12, GMI, UP, NORMAL, INPUT),
324 DEFAULT_PINMUX(GMI_AD13, GMI, DOWN, NORMAL, OUTPUT),
325 DEFAULT_PINMUX(GMI_AD2, GMI, NORMAL, NORMAL, INPUT),
326 DEFAULT_PINMUX(GMI_AD3, GMI, NORMAL, NORMAL, INPUT),
327 DEFAULT_PINMUX(GMI_AD8, GMI, DOWN, NORMAL, OUTPUT),
328 DEFAULT_PINMUX(GMI_ADV_N, GMI, UP, NORMAL, INPUT),
329 DEFAULT_PINMUX(GMI_CLK, GMI, DOWN, NORMAL, OUTPUT),
330 DEFAULT_PINMUX(GMI_CS0_N, GMI, UP, NORMAL, INPUT),
331 DEFAULT_PINMUX(GMI_CS2_N, GMI, UP, NORMAL, INPUT),
332 DEFAULT_PINMUX(GMI_CS3_N, GMI, UP, NORMAL, OUTPUT),
333 DEFAULT_PINMUX(GMI_CS4_N, GMI, UP, NORMAL, INPUT),
334 DEFAULT_PINMUX(GMI_CS7_N, GMI, UP, NORMAL, INPUT),
335 DEFAULT_PINMUX(GMI_DQS, GMI, UP, NORMAL, INPUT),
336 DEFAULT_PINMUX(GMI_IORDY, GMI, UP, NORMAL, INPUT),
337 DEFAULT_PINMUX(GMI_WP_N, GMI, UP, NORMAL, INPUT),
338
339 DEFAULT_PINMUX(SDMMC1_WP_N, SPI4, UP, NORMAL, OUTPUT),
340 DEFAULT_PINMUX(CLK2_REQ, RSVD3, NORMAL, NORMAL, OUTPUT),
341
342 DEFAULT_PINMUX(KB_COL3, KBC, UP, NORMAL, OUTPUT),
343 DEFAULT_PINMUX(KB_COL4, SDMMC3, UP, NORMAL, INPUT),
344 DEFAULT_PINMUX(KB_COL5, KBC, UP, NORMAL, INPUT),
345 DEFAULT_PINMUX(KB_COL6, KBC, UP, NORMAL, OUTPUT),
346 DEFAULT_PINMUX(KB_COL7, KBC, UP, NORMAL, OUTPUT),
347 DEFAULT_PINMUX(KB_ROW3, KBC, DOWN, NORMAL, INPUT),
348 DEFAULT_PINMUX(KB_ROW4, KBC, DOWN, NORMAL, INPUT),
349 DEFAULT_PINMUX(KB_ROW6, KBC, DOWN, NORMAL, INPUT),
350 DEFAULT_PINMUX(KB_ROW8, KBC, UP, NORMAL, INPUT),
351
352 DEFAULT_PINMUX(CLK3_REQ, RSVD3, NORMAL, NORMAL, OUTPUT),
353 DEFAULT_PINMUX(GPIO_PU4, RSVD3, NORMAL, NORMAL, OUTPUT),
354 DEFAULT_PINMUX(GPIO_PU5, RSVD3, NORMAL, NORMAL, INPUT),
355 DEFAULT_PINMUX(GPIO_PU6, RSVD3, NORMAL, NORMAL, INPUT),
356
357 DEFAULT_PINMUX(HDMI_INT, RSVD1, DOWN, NORMAL, INPUT),
358
359 DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT),
360 DEFAULT_PINMUX(SPDIF_IN, USB, NORMAL, NORMAL, INPUT),
361
362 DEFAULT_PINMUX(SDMMC3_CD_N, SDMMC3, UP, NORMAL, INPUT),
363};
364#endif /* PINMUX_CONFIG_COMMON_H */