wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 1 | /* |
| 2 | * COM1 NS16550 support |
Stefan Roese | 88fbf93 | 2010-04-15 16:07:28 +0200 | [diff] [blame] | 3 | * originally from linux source (arch/powerpc/boot/ns16550.c) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 4 | * modified to use CONFIG_SYS_ISA_MEM and new defines |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <config.h> |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 8 | #include <ns16550.h> |
Ladislav Michl | cc29442 | 2010-02-01 23:34:25 +0100 | [diff] [blame] | 9 | #include <watchdog.h> |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 10 | #include <linux/types.h> |
| 11 | #include <asm/io.h> |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 12 | |
Detlev Zundel | 166fb54 | 2009-04-03 11:53:01 +0200 | [diff] [blame] | 13 | #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ |
| 14 | #define UART_MCRVAL (UART_MCR_DTR | \ |
| 15 | UART_MCR_RTS) /* RTS/DTR */ |
| 16 | #define UART_FCRVAL (UART_FCR_FIFO_EN | \ |
| 17 | UART_FCR_RXSR | \ |
| 18 | UART_FCR_TXSR) /* Clear & enable FIFOs */ |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 19 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 20 | #define serial_out(x, y) outb(x, (ulong)y) |
| 21 | #define serial_in(y) inb((ulong)y) |
Dave Aldridge | a51bebc | 2011-09-01 22:47:14 +0000 | [diff] [blame] | 22 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 23 | #define serial_out(x, y) out_be32(y, x) |
| 24 | #define serial_in(y) in_be32(y) |
Dave Aldridge | a51bebc | 2011-09-01 22:47:14 +0000 | [diff] [blame] | 25 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 26 | #define serial_out(x, y) out_le32(y, x) |
| 27 | #define serial_in(y) in_le32(y) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 28 | #else |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 29 | #define serial_out(x, y) writeb(x, y) |
| 30 | #define serial_in(y) readb(y) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 31 | #endif |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 32 | |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 33 | #if defined(CONFIG_K2HK_EVM) |
| 34 | #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 |
| 35 | #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) |
Karicheri, Muralidharan | cbc0888 | 2014-04-09 15:38:46 -0400 | [diff] [blame] | 36 | #undef UART_MCRVAL |
| 37 | #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL |
| 38 | #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) |
| 39 | #else |
| 40 | #define UART_MCRVAL (UART_MCR_RTS) |
| 41 | #endif |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 42 | #endif |
| 43 | |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 44 | #ifndef CONFIG_SYS_NS16550_IER |
| 45 | #define CONFIG_SYS_NS16550_IER 0x00 |
| 46 | #endif /* CONFIG_SYS_NS16550_IER */ |
| 47 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 48 | void NS16550_init(NS16550_t com_port, int baud_divisor) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 49 | { |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 50 | #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_OMAP34XX)) |
| 51 | /* |
| 52 | * On some OMAP3 devices when UART3 is configured for boot mode before |
| 53 | * SPL starts only THRE bit is set. We have to empty the transmitter |
| 54 | * before initialization starts. |
| 55 | */ |
| 56 | if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) |
| 57 | == UART_LSR_THRE) { |
| 58 | serial_out(UART_LCR_DLAB, &com_port->lcr); |
| 59 | serial_out(baud_divisor & 0xff, &com_port->dll); |
| 60 | serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); |
| 61 | serial_out(UART_LCRVAL, &com_port->lcr); |
| 62 | serial_out(0, &com_port->mdr1); |
| 63 | } |
| 64 | #endif |
| 65 | |
Scott Wood | 6c6f061 | 2012-09-18 18:19:05 -0500 | [diff] [blame] | 66 | while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) |
| 67 | ; |
| 68 | |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 69 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
Tom Rini | fc695e3 | 2013-12-20 11:19:33 -0500 | [diff] [blame] | 70 | #if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \ |
| 71 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 72 | serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ |
wdenk | 21136db | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 73 | #endif |
Simon Glass | 19bc501 | 2013-03-05 14:40:02 +0000 | [diff] [blame] | 74 | serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 75 | serial_out(0, &com_port->dll); |
| 76 | serial_out(0, &com_port->dlm); |
| 77 | serial_out(UART_LCRVAL, &com_port->lcr); |
| 78 | serial_out(UART_MCRVAL, &com_port->mcr); |
| 79 | serial_out(UART_FCRVAL, &com_port->fcr); |
| 80 | serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); |
| 81 | serial_out(baud_divisor & 0xff, &com_port->dll); |
| 82 | serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); |
| 83 | serial_out(UART_LCRVAL, &com_port->lcr); |
Chandan Nath | 7d74410 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 84 | #if (defined(CONFIG_OMAP) && !defined(CONFIG_OMAP3_ZOOM2)) || \ |
Matt Porter | 7967b1a | 2013-03-15 10:07:09 +0000 | [diff] [blame] | 85 | defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ |
TENART Antoine | a6be77c | 2013-07-02 12:05:58 +0200 | [diff] [blame] | 86 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) |
Chandan Nath | 7d74410 | 2011-10-14 02:58:26 +0000 | [diff] [blame] | 87 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 88 | /* /16 is proper to hit 115200 with 48MHz */ |
| 89 | serial_out(0, &com_port->mdr1); |
Mike Frysinger | d0e9786 | 2009-02-11 20:26:52 -0500 | [diff] [blame] | 90 | #endif /* CONFIG_OMAP */ |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 91 | #if defined(CONFIG_K2HK_EVM) |
| 92 | serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); |
| 93 | #endif |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 94 | } |
| 95 | |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 96 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 97 | void NS16550_reinit(NS16550_t com_port, int baud_divisor) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 98 | { |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 99 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 100 | serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); |
| 101 | serial_out(0, &com_port->dll); |
| 102 | serial_out(0, &com_port->dlm); |
| 103 | serial_out(UART_LCRVAL, &com_port->lcr); |
| 104 | serial_out(UART_MCRVAL, &com_port->mcr); |
| 105 | serial_out(UART_FCRVAL, &com_port->fcr); |
| 106 | serial_out(UART_LCR_BKSE, &com_port->lcr); |
| 107 | serial_out(baud_divisor & 0xff, &com_port->dll); |
| 108 | serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); |
| 109 | serial_out(UART_LCRVAL, &com_port->lcr); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 110 | } |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 111 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 112 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 113 | void NS16550_putc(NS16550_t com_port, char c) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 114 | { |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 115 | while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) |
| 116 | ; |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 117 | serial_out(c, &com_port->thr); |
Stefan Roese | 57b9988 | 2010-10-12 09:39:45 +0200 | [diff] [blame] | 118 | |
| 119 | /* |
| 120 | * Call watchdog_reset() upon newline. This is done here in putc |
| 121 | * since the environment code uses a single puts() to print the complete |
| 122 | * environment upon "printenv". So we can't put this watchdog call |
| 123 | * in puts(). |
| 124 | */ |
| 125 | if (c == '\n') |
| 126 | WATCHDOG_RESET(); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 127 | } |
| 128 | |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 129 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 130 | char NS16550_getc(NS16550_t com_port) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 131 | { |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 132 | while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { |
Marek Vasut | 9e1fca9 | 2012-09-15 10:25:19 +0200 | [diff] [blame] | 133 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY) |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 134 | extern void usbtty_poll(void); |
| 135 | usbtty_poll(); |
| 136 | #endif |
Ladislav Michl | cc29442 | 2010-02-01 23:34:25 +0100 | [diff] [blame] | 137 | WATCHDOG_RESET(); |
wdenk | 29e7f5a | 2004-03-12 00:14:09 +0000 | [diff] [blame] | 138 | } |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 139 | return serial_in(&com_port->rbr); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 140 | } |
| 141 | |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 142 | int NS16550_tstc(NS16550_t com_port) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 143 | { |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 144 | return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 145 | } |
| 146 | |
Ron Madrid | dfa028a | 2009-02-18 14:30:44 -0800 | [diff] [blame] | 147 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |