Matthias Kaehlcke | 195dbd1 | 2010-02-01 21:29:39 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Cirrus Logic EP93xx timer support. |
| 3 | * |
| 4 | * Copyright (C) 2009, 2010 |
| 5 | * Matthias Kaehlcke <matthias@kaehlcke.net> |
| 6 | * |
| 7 | * Copyright (C) 2004, 2005 |
| 8 | * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com> |
| 9 | * |
| 10 | * Based on the original intr.c Cirrus Logic EP93xx Rev D. interrupt support, |
| 11 | * author unknown. |
| 12 | * |
| 13 | * See file CREDITS for list of people who contributed to this project. |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or modify |
| 16 | * it under the terms of the GNU General Public License as published by |
| 17 | * the Free Software Foundation; either version 2 of the License, or |
| 18 | * (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, but |
| 21 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 22 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 23 | * for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License along |
| 26 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 27 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 28 | */ |
| 29 | |
| 30 | #include <common.h> |
| 31 | #include <linux/types.h> |
| 32 | #include <asm/arch/ep93xx.h> |
| 33 | #include <asm/io.h> |
| 34 | |
| 35 | #define TIMER_CLKSEL (1 << 3) |
| 36 | #define TIMER_MODE (1 << 6) |
| 37 | #define TIMER_ENABLE (1 << 7) |
| 38 | |
| 39 | #define TIMER_FREQ 508469 |
| 40 | #define TIMER_LOAD_VAL (TIMER_FREQ / CONFIG_SYS_HZ) |
| 41 | |
| 42 | static ulong timestamp; |
| 43 | static ulong lastdec; |
| 44 | |
| 45 | static inline unsigned long clk_to_systicks(unsigned long clk_ticks) |
| 46 | { |
| 47 | unsigned long sys_ticks = (clk_ticks * CONFIG_SYS_HZ) / TIMER_FREQ; |
| 48 | |
| 49 | return sys_ticks; |
| 50 | } |
| 51 | |
| 52 | static inline unsigned long usecs_to_ticks(unsigned long usecs) |
| 53 | { |
| 54 | unsigned long ticks; |
| 55 | |
| 56 | if (usecs >= 1000) { |
| 57 | ticks = usecs / 1000; |
| 58 | ticks *= (TIMER_LOAD_VAL * CONFIG_SYS_HZ); |
| 59 | ticks /= 1000; |
| 60 | } else { |
| 61 | ticks = usecs * TIMER_LOAD_VAL * CONFIG_SYS_HZ; |
| 62 | ticks /= (1000 * 1000); |
| 63 | } |
| 64 | |
| 65 | return ticks; |
| 66 | } |
| 67 | |
| 68 | static inline unsigned long read_timer(void) |
| 69 | { |
| 70 | struct timer_regs *timer = (struct timer_regs *)TIMER_BASE; |
| 71 | |
| 72 | return readl(&timer->timer3.value); |
| 73 | } |
| 74 | |
| 75 | /* |
| 76 | * timer without interrupts |
| 77 | */ |
| 78 | unsigned long long get_ticks(void) |
| 79 | { |
| 80 | const unsigned long now = read_timer(); |
| 81 | |
| 82 | if (lastdec >= now) { |
| 83 | /* normal mode */ |
| 84 | timestamp += lastdec - now; |
| 85 | } else { |
| 86 | /* we have an overflow ... */ |
| 87 | timestamp += lastdec + TIMER_LOAD_VAL - now; |
| 88 | } |
| 89 | |
| 90 | lastdec = now; |
| 91 | |
| 92 | return timestamp; |
| 93 | } |
| 94 | |
| 95 | unsigned long get_timer_masked(void) |
| 96 | { |
| 97 | return clk_to_systicks(get_ticks()); |
| 98 | } |
| 99 | |
| 100 | unsigned long get_timer(unsigned long base) |
| 101 | { |
| 102 | return get_timer_masked() - base; |
| 103 | } |
| 104 | |
| 105 | void reset_timer_masked(void) |
| 106 | { |
| 107 | lastdec = read_timer(); |
| 108 | timestamp = 0; |
| 109 | } |
| 110 | |
| 111 | void reset_timer(void) |
| 112 | { |
| 113 | reset_timer_masked(); |
| 114 | } |
| 115 | |
| 116 | void set_timer(unsigned long t) |
| 117 | { |
| 118 | timestamp = t; |
| 119 | } |
| 120 | |
| 121 | void __udelay(unsigned long usec) |
| 122 | { |
| 123 | const unsigned long ticks = usecs_to_ticks(usec); |
| 124 | const unsigned long target = clk_to_systicks(ticks) + get_timer(0); |
| 125 | |
| 126 | while (get_timer_masked() < target) |
| 127 | /* noop */; |
| 128 | } |
| 129 | |
| 130 | void udelay_masked(unsigned long usec) |
| 131 | { |
| 132 | const unsigned long ticks = usecs_to_ticks(usec); |
| 133 | const unsigned long target = clk_to_systicks(ticks) + get_timer(0); |
| 134 | |
| 135 | reset_timer_masked(); |
| 136 | |
| 137 | while (get_timer_masked() < target) |
| 138 | /* noop */; |
| 139 | } |
| 140 | |
| 141 | int timer_init(void) |
| 142 | { |
| 143 | struct timer_regs *timer = (struct timer_regs *)TIMER_BASE; |
| 144 | |
| 145 | /* use timer 3 with 508KHz and free running */ |
| 146 | writel(TIMER_CLKSEL, &timer->timer3.control); |
| 147 | |
| 148 | /* auto load, manual update of Timer 3 */ |
| 149 | lastdec = TIMER_LOAD_VAL; |
| 150 | writel(TIMER_LOAD_VAL, &timer->timer3.load); |
| 151 | |
| 152 | /* Enable the timer and periodic mode */ |
| 153 | writel(TIMER_ENABLE | TIMER_MODE | TIMER_CLKSEL, |
| 154 | &timer->timer3.control); |
| 155 | |
| 156 | reset_timer_masked(); |
| 157 | |
| 158 | return 0; |
| 159 | } |
| 160 | |
| 161 | /* |
| 162 | * This function is derived from PowerPC code (timebase clock frequency). |
| 163 | * On ARM it returns the number of timer ticks per second. |
| 164 | */ |
| 165 | unsigned long get_tbclk(void) |
| 166 | { |
| 167 | return CONFIG_SYS_HZ; |
| 168 | } |