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Jon Loeligere4773be2006-10-19 11:02:16 -05001/*
2 * Copyright 2006 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * Version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
16 * MA 02111-1307 USA
17 */
18
Jon Loeligere4773be2006-10-19 11:02:16 -050019#include <common.h>
Jon Loeligere4773be2006-10-19 11:02:16 -050020
Jon Loeliger43d818f2006-10-20 15:50:15 -050021#ifdef CONFIG_FSL_I2C
Jon Loeligere4773be2006-10-19 11:02:16 -050022#ifdef CONFIG_HARD_I2C
23
Jon Loeliger24df9772006-10-19 12:02:24 -050024#include <command.h>
Jon Loeliger43d818f2006-10-20 15:50:15 -050025#include <i2c.h> /* Functional interface */
26
Jon Loeligere4773be2006-10-19 11:02:16 -050027#include <asm/io.h>
Jon Loeliger43d818f2006-10-20 15:50:15 -050028#include <asm/fsl_i2c.h> /* HW definitions */
Jon Loeligere4773be2006-10-19 11:02:16 -050029
30#define I2C_TIMEOUT (CFG_HZ / 4)
31
Joakim Tjernlundc32c5f72006-11-28 16:17:27 -060032#define I2C_READ_BIT 1
33#define I2C_WRITE_BIT 0
34
Timur Tabiab347542006-11-03 19:15:00 -060035/* Initialize the bus pointer to whatever one the SPD EEPROM is on.
36 * Default is bus 0. This is necessary because the DDR initialization
37 * runs from ROM, and we can't switch buses because we can't modify
38 * the global variables.
39 */
40#ifdef CFG_SPD_BUS_NUM
41static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = CFG_SPD_BUS_NUM;
42#else
43static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
44#endif
45
46static volatile struct fsl_i2c *i2c_dev[2] = {
47 (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET),
48#ifdef CFG_I2C2_OFFSET
49 (struct fsl_i2c *) (CFG_IMMR + CFG_I2C2_OFFSET)
50#endif
51};
Jon Loeligere4773be2006-10-19 11:02:16 -050052
53void
54i2c_init(int speed, int slaveadd)
55{
Timur Tabiab347542006-11-03 19:15:00 -060056 volatile struct fsl_i2c *dev;
Jon Loeligere4773be2006-10-19 11:02:16 -050057
Timur Tabiab347542006-11-03 19:15:00 -060058 dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET);
Jon Loeligere4773be2006-10-19 11:02:16 -050059
Timur Tabiab347542006-11-03 19:15:00 -060060 writeb(0, &dev->cr); /* stop I2C controller */
Joakim Tjernlundb648fe72007-01-31 11:04:19 +010061 udelay(5); /* let it shutdown in peace */
Timur Tabiab347542006-11-03 19:15:00 -060062 writeb(0x3F, &dev->fdr); /* set bus speed */
63 writeb(0x3F, &dev->dfsrr); /* set default filter */
Joakim Tjernlunda292af22006-11-28 16:17:18 -060064 writeb(slaveadd << 1, &dev->adr); /* write slave address */
Timur Tabiab347542006-11-03 19:15:00 -060065 writeb(0x0, &dev->sr); /* clear status register */
66 writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
Jon Loeligere4773be2006-10-19 11:02:16 -050067
Timur Tabiab347542006-11-03 19:15:00 -060068#ifdef CFG_I2C2_OFFSET
69 dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C2_OFFSET);
Jon Loeligere4773be2006-10-19 11:02:16 -050070
Timur Tabiab347542006-11-03 19:15:00 -060071 writeb(0, &dev->cr); /* stop I2C controller */
Timur Tabi193d3342007-07-03 13:46:32 -050072 udelay(5); /* let it shutdown in peace */
Timur Tabiab347542006-11-03 19:15:00 -060073 writeb(0x3F, &dev->fdr); /* set bus speed */
74 writeb(0x3F, &dev->dfsrr); /* set default filter */
Timur Tabi193d3342007-07-03 13:46:32 -050075 writeb(slaveadd << 1, &dev->adr); /* write slave address */
Timur Tabiab347542006-11-03 19:15:00 -060076 writeb(0x0, &dev->sr); /* clear status register */
77 writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
78#endif /* CFG_I2C2_OFFSET */
Jon Loeligere4773be2006-10-19 11:02:16 -050079}
80
81static __inline__ int
82i2c_wait4bus(void)
83{
Jon Loeliger43d818f2006-10-20 15:50:15 -050084 ulong timeval = get_timer(0);
Jon Loeligere4773be2006-10-19 11:02:16 -050085
Timur Tabiab347542006-11-03 19:15:00 -060086 while (readb(&i2c_dev[i2c_bus_num]->sr) & I2C_SR_MBB) {
Jon Loeligere4773be2006-10-19 11:02:16 -050087 if (get_timer(timeval) > I2C_TIMEOUT) {
88 return -1;
89 }
90 }
91
92 return 0;
93}
94
95static __inline__ int
96i2c_wait(int write)
97{
98 u32 csr;
99 ulong timeval = get_timer(0);
100
101 do {
Timur Tabiab347542006-11-03 19:15:00 -0600102 csr = readb(&i2c_dev[i2c_bus_num]->sr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500103 if (!(csr & I2C_SR_MIF))
104 continue;
105
Timur Tabiab347542006-11-03 19:15:00 -0600106 writeb(0x0, &i2c_dev[i2c_bus_num]->sr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500107
108 if (csr & I2C_SR_MAL) {
109 debug("i2c_wait: MAL\n");
110 return -1;
111 }
112
113 if (!(csr & I2C_SR_MCF)) {
114 debug("i2c_wait: unfinished\n");
115 return -1;
116 }
117
Joakim Tjernlundc32c5f72006-11-28 16:17:27 -0600118 if (write == I2C_WRITE_BIT && (csr & I2C_SR_RXAK)) {
Jon Loeligere4773be2006-10-19 11:02:16 -0500119 debug("i2c_wait: No RXACK\n");
120 return -1;
121 }
122
123 return 0;
124 } while (get_timer (timeval) < I2C_TIMEOUT);
125
126 debug("i2c_wait: timed out\n");
127 return -1;
128}
129
130static __inline__ int
131i2c_write_addr (u8 dev, u8 dir, int rsta)
132{
133 writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX
134 | (rsta ? I2C_CR_RSTA : 0),
Timur Tabiab347542006-11-03 19:15:00 -0600135 &i2c_dev[i2c_bus_num]->cr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500136
Timur Tabiab347542006-11-03 19:15:00 -0600137 writeb((dev << 1) | dir, &i2c_dev[i2c_bus_num]->dr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500138
Joakim Tjernlundc32c5f72006-11-28 16:17:27 -0600139 if (i2c_wait(I2C_WRITE_BIT) < 0)
Jon Loeligere4773be2006-10-19 11:02:16 -0500140 return 0;
141
142 return 1;
143}
144
145static __inline__ int
146__i2c_write(u8 *data, int length)
147{
148 int i;
149
150 writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_MTX,
Timur Tabiab347542006-11-03 19:15:00 -0600151 &i2c_dev[i2c_bus_num]->cr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500152
153 for (i = 0; i < length; i++) {
Timur Tabiab347542006-11-03 19:15:00 -0600154 writeb(data[i], &i2c_dev[i2c_bus_num]->dr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500155
Joakim Tjernlundc32c5f72006-11-28 16:17:27 -0600156 if (i2c_wait(I2C_WRITE_BIT) < 0)
Jon Loeligere4773be2006-10-19 11:02:16 -0500157 break;
158 }
159
160 return i;
161}
162
163static __inline__ int
164__i2c_read(u8 *data, int length)
165{
166 int i;
167
168 writeb(I2C_CR_MEN | I2C_CR_MSTA | ((length == 1) ? I2C_CR_TXAK : 0),
Timur Tabiab347542006-11-03 19:15:00 -0600169 &i2c_dev[i2c_bus_num]->cr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500170
171 /* dummy read */
Timur Tabiab347542006-11-03 19:15:00 -0600172 readb(&i2c_dev[i2c_bus_num]->dr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500173
174 for (i = 0; i < length; i++) {
Joakim Tjernlundc32c5f72006-11-28 16:17:27 -0600175 if (i2c_wait(I2C_READ_BIT) < 0)
Jon Loeligere4773be2006-10-19 11:02:16 -0500176 break;
177
178 /* Generate ack on last next to last byte */
179 if (i == length - 2)
180 writeb(I2C_CR_MEN | I2C_CR_MSTA | I2C_CR_TXAK,
Timur Tabiab347542006-11-03 19:15:00 -0600181 &i2c_dev[i2c_bus_num]->cr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500182
183 /* Generate stop on last byte */
184 if (i == length - 1)
Timur Tabiab347542006-11-03 19:15:00 -0600185 writeb(I2C_CR_MEN | I2C_CR_TXAK, &i2c_dev[i2c_bus_num]->cr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500186
Timur Tabiab347542006-11-03 19:15:00 -0600187 data[i] = readb(&i2c_dev[i2c_bus_num]->dr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500188 }
189
190 return i;
191}
192
193int
194i2c_read(u8 dev, uint addr, int alen, u8 *data, int length)
195{
Joakim Tjernlundb648fe72007-01-31 11:04:19 +0100196 int i = -1; /* signal error */
Jon Loeligere4773be2006-10-19 11:02:16 -0500197 u8 *a = (u8*)&addr;
198
Jon Loeliger24df9772006-10-19 12:02:24 -0500199 if (i2c_wait4bus() >= 0
Joakim Tjernlundc32c5f72006-11-28 16:17:27 -0600200 && i2c_write_addr(dev, I2C_WRITE_BIT, 0) != 0
Joakim Tjernlundb648fe72007-01-31 11:04:19 +0100201 && __i2c_write(&a[4 - alen], alen) == alen)
202 i = 0; /* No error so far */
203
204 if (length
205 && i2c_write_addr(dev, I2C_READ_BIT, 1) != 0)
Jon Loeliger24df9772006-10-19 12:02:24 -0500206 i = __i2c_read(data, length);
Jon Loeligere4773be2006-10-19 11:02:16 -0500207
Timur Tabiab347542006-11-03 19:15:00 -0600208 writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500209
Jon Loeliger24df9772006-10-19 12:02:24 -0500210 if (i == length)
211 return 0;
212
213 return -1;
Jon Loeligere4773be2006-10-19 11:02:16 -0500214}
215
216int
217i2c_write(u8 dev, uint addr, int alen, u8 *data, int length)
218{
Joakim Tjernlundb648fe72007-01-31 11:04:19 +0100219 int i = -1; /* signal error */
Jon Loeligere4773be2006-10-19 11:02:16 -0500220 u8 *a = (u8*)&addr;
221
Jon Loeliger24df9772006-10-19 12:02:24 -0500222 if (i2c_wait4bus() >= 0
Joakim Tjernlundc32c5f72006-11-28 16:17:27 -0600223 && i2c_write_addr(dev, I2C_WRITE_BIT, 0) != 0
Jon Loeliger24df9772006-10-19 12:02:24 -0500224 && __i2c_write(&a[4 - alen], alen) == alen) {
225 i = __i2c_write(data, length);
226 }
Jon Loeligere4773be2006-10-19 11:02:16 -0500227
Timur Tabiab347542006-11-03 19:15:00 -0600228 writeb(I2C_CR_MEN, &i2c_dev[i2c_bus_num]->cr);
Jon Loeligere4773be2006-10-19 11:02:16 -0500229
Jon Loeliger24df9772006-10-19 12:02:24 -0500230 if (i == length)
231 return 0;
232
233 return -1;
Jon Loeligere4773be2006-10-19 11:02:16 -0500234}
235
236int
237i2c_probe(uchar chip)
238{
Joakim Tjernlundb648fe72007-01-31 11:04:19 +0100239 /* For unknow reason the controller will ACK when
240 * probing for a slave with the same address, so skip
241 * it.
Jon Loeligere4773be2006-10-19 11:02:16 -0500242 */
Joakim Tjernlundb648fe72007-01-31 11:04:19 +0100243 if (chip == (readb(&i2c_dev[i2c_bus_num]->adr) >> 1))
244 return -1;
Jon Loeligere4773be2006-10-19 11:02:16 -0500245
Joakim Tjernlundb648fe72007-01-31 11:04:19 +0100246 return i2c_read(chip, 0, 0, NULL, 0);
Jon Loeligere4773be2006-10-19 11:02:16 -0500247}
248
249uchar
250i2c_reg_read(uchar i2c_addr, uchar reg)
251{
252 uchar buf[1];
253
254 i2c_read(i2c_addr, reg, 1, buf, 1);
255
256 return buf[0];
257}
258
259void
260i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
261{
262 i2c_write(i2c_addr, reg, 1, &val, 1);
263}
264
Timur Tabiab347542006-11-03 19:15:00 -0600265int i2c_set_bus_num(unsigned int bus)
266{
267#ifdef CFG_I2C2_OFFSET
268 if (bus > 1) {
269#else
270 if (bus > 0) {
271#endif
272 return -1;
273 }
274
275 i2c_bus_num = bus;
276
277 return 0;
278}
279
280int i2c_set_bus_speed(unsigned int speed)
281{
282 return -1;
283}
284
285unsigned int i2c_get_bus_num(void)
286{
287 return i2c_bus_num;
288}
289
290unsigned int i2c_get_bus_speed(void)
291{
292 return 0;
293}
Jon Loeligere4773be2006-10-19 11:02:16 -0500294#endif /* CONFIG_HARD_I2C */
Jon Loeliger43d818f2006-10-20 15:50:15 -0500295#endif /* CONFIG_FSL_I2C */