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git01.mediatek.com / filogic / uboot / 1925114ea820ed1ac63cbb883e72ace6037e07e4 / . / board / spear / spear300 / spear300.c
blob: e25aba2f28747a798bd1335fce2a868ae91e02cc [file] [log] [blame]
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]1/*
2 * (C) Copyright 2009
3 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]6 */
7
8#include <common.h>
Vipin Kumar7443d602012-05-07 13:06:44 +0530[diff] [blame]9#include <miiphy.h>
Vipin KUMAR6b49f982012-05-07 13:06:42 +0530[diff] [blame]10#include <netdev.h>
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]11#include <nand.h>
12#include <asm/io.h>
Vipin KUMARf1bd24e2012-05-22 00:15:55 +0000[diff] [blame]13#include <linux/mtd/fsmc_nand.h>
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]14#include <asm/arch/hardware.h>
15#include <asm/arch/spr_defs.h>
16#include <asm/arch/spr_misc.h>
Vipin KUMARf1bd24e2012-05-22 00:15:55 +0000[diff] [blame]17
18static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]19
20int board_init(void)
21{
22 return spear_board_init(MACH_TYPE_SPEAR300);
23}
24
25/*
26 * board_nand_init - Board specific NAND initialization
27 * @nand: mtd private chip structure
28 *
29 * Called by nand_init_chip to initialize the board specific functions
30 */
31
Vipin KUMARf1bd24e2012-05-22 00:15:55 +0000[diff] [blame]32void board_nand_init()
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]33{
34 struct misc_regs *const misc_regs_p =
35 (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
Vipin KUMARf1bd24e2012-05-22 00:15:55 +0000[diff] [blame]36 struct nand_chip *nand = &nand_chip[0];
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]37
Vipin KUMARf1bd24e2012-05-22 00:15:55 +0000[diff] [blame]38#if defined(CONFIG_NAND_FSMC)
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]39 if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
40 MISC_SOCCFG30) ||
41 ((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
42 MISC_SOCCFG31)) {
43
Vipin KUMARf1bd24e2012-05-22 00:15:55 +0000[diff] [blame]44 fsmc_nand_init(nand);
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]45 }
Vipin KUMARf1bd24e2012-05-22 00:15:55 +0000[diff] [blame]46#endif
47 return;
Vipin KUMARb0ea0892010-01-15 19:15:50 +0530[diff] [blame]48}
Vipin KUMAR6b49f982012-05-07 13:06:42 +0530[diff] [blame]49
50int board_eth_init(bd_t *bis)
51{
Vipin Kumar7443d602012-05-07 13:06:44 +0530[diff] [blame]52 int ret = 0;
53
Vipin KUMAR6b49f982012-05-07 13:06:42 +0530[diff] [blame]54#if defined(CONFIG_DESIGNWARE_ETH)
Vipin Kumar7443d602012-05-07 13:06:44 +0530[diff] [blame]55 u32 interface = PHY_INTERFACE_MODE_MII;
56 if (designware_initialize(0, CONFIG_SPEAR_ETHBASE, CONFIG_DW0_PHY,
57 interface) >= 0)
58 ret++;
Vipin KUMAR6b49f982012-05-07 13:06:42 +0530[diff] [blame]59#endif
Vipin Kumar7443d602012-05-07 13:06:44 +0530[diff] [blame]60 return ret;
Vipin KUMAR6b49f982012-05-07 13:06:42 +0530[diff] [blame]61}