Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 18efdafabf7a121b17abd90c574c8add612c6daf / . / arch / arm / mach-renesas / include / mach / rcar-mstp.h
blob: 7ca362e519c5adb4c3d402913173bd18e7e9f5fa [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0 */
Nobuhiro Iwamatsuade3c942014-12-02 16:52:19 +0900[diff] [blame]2/*
Marek Vasute3f84ec2024-02-27 17:05:56 +0100[diff] [blame]3 * arch/arm/include/asm/arch-renesas/rcar-mstp.h
Nobuhiro Iwamatsuade3c942014-12-02 16:52:19 +0900[diff] [blame]4 *
5 * Copyright (C) 2013, 2014 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 * Copyright (C) 2013, 2014 Renesas Electronics Corporation
Nobuhiro Iwamatsuade3c942014-12-02 16:52:19 +0900[diff] [blame]7 */
8
9#ifndef __ASM_ARCH_RCAR_MSTP_H
10#define __ASM_ARCH_RCAR_MSTP_H
11
12#define mstp_setbits(type, addr, saddr, set) \
13 out_##type((saddr), in_##type(addr) | (set))
14#define mstp_clrbits(type, addr, saddr, clear) \
15 out_##type((saddr), in_##type(addr) & ~(clear))
Nobuhiro Iwamatsu8d7dcd22014-12-02 16:52:21 +0900[diff] [blame]16#define mstp_setclrbits(type, addr, set, clear) \
17 out_##type((addr), (in_##type(addr) | (set)) & ~(clear))
Nobuhiro Iwamatsuade3c942014-12-02 16:52:19 +0900[diff] [blame]18#define mstp_setbits_le32(addr, saddr, set) \
19 mstp_setbits(le32, addr, saddr, set)
20#define mstp_clrbits_le32(addr, saddr, clear) \
21 mstp_clrbits(le32, addr, saddr, clear)
Nobuhiro Iwamatsu8d7dcd22014-12-02 16:52:21 +0900[diff] [blame]22#define mstp_setclrbits_le32(addr, set, clear) \
23 mstp_setclrbits(le32, addr, set, clear)
Nobuhiro Iwamatsuade3c942014-12-02 16:52:19 +0900[diff] [blame]24
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]25#ifndef CFG_SMSTP0_ENA
26#define CFG_SMSTP0_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]27#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]28#ifndef CFG_SMSTP1_ENA
29#define CFG_SMSTP1_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]30#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]31#ifndef CFG_SMSTP2_ENA
32#define CFG_SMSTP2_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]33#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]34#ifndef CFG_SMSTP3_ENA
35#define CFG_SMSTP3_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]36#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]37#ifndef CFG_SMSTP4_ENA
38#define CFG_SMSTP4_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]39#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]40#ifndef CFG_SMSTP5_ENA
41#define CFG_SMSTP5_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]42#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]43#ifndef CFG_SMSTP6_ENA
44#define CFG_SMSTP6_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]45#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]46#ifndef CFG_SMSTP7_ENA
47#define CFG_SMSTP7_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]48#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]49#ifndef CFG_SMSTP8_ENA
50#define CFG_SMSTP8_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]51#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]52#ifndef CFG_SMSTP9_ENA
53#define CFG_SMSTP9_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]54#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]55#ifndef CFG_SMSTP10_ENA
56#define CFG_SMSTP10_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]57#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]58#ifndef CFG_SMSTP11_ENA
59#define CFG_SMSTP11_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]60#endif
61
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]62#ifndef CFG_RMSTP0_ENA
63#define CFG_RMSTP0_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]64#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]65#ifndef CFG_RMSTP1_ENA
66#define CFG_RMSTP1_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]67#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]68#ifndef CFG_RMSTP2_ENA
69#define CFG_RMSTP2_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]70#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]71#ifndef CFG_RMSTP3_ENA
72#define CFG_RMSTP3_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]73#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]74#ifndef CFG_RMSTP4_ENA
75#define CFG_RMSTP4_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]76#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]77#ifndef CFG_RMSTP5_ENA
78#define CFG_RMSTP5_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]79#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]80#ifndef CFG_RMSTP6_ENA
81#define CFG_RMSTP6_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]82#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]83#ifndef CFG_RMSTP7_ENA
84#define CFG_RMSTP7_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]85#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]86#ifndef CFG_RMSTP8_ENA
87#define CFG_RMSTP8_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]88#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]89#ifndef CFG_RMSTP9_ENA
90#define CFG_RMSTP9_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]91#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]92#ifndef CFG_RMSTP10_ENA
93#define CFG_RMSTP10_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]94#endif
Tom Rini364d0022023-01-10 11:19:45 -0500[diff] [blame]95#ifndef CFG_RMSTP11_ENA
96#define CFG_RMSTP11_ENA 0x00
Nobuhiro Iwamatsu5c700232014-12-02 16:52:23 +0900[diff] [blame]97#endif
98
99struct mstp_ctl {
100 u32 s_addr;
101 u32 s_dis;
102 u32 s_ena;
103 u32 r_addr;
104 u32 r_dis;
105 u32 r_ena;
106};
107
Nobuhiro Iwamatsuade3c942014-12-02 16:52:19 +0900[diff] [blame]108#endif /* __ASM_ARCH_RCAR_MSTP_H */