blob: f89eb091a992acae29c6d25ac981e79466087e89 [file] [log] [blame]
Stefan Agner150ddbc2018-06-22 18:06:17 +02001/*
2 * NXP GPMI NAND flash driver (DT initialization)
3 *
4 * Copyright (C) 2018 Toradex
5 * Authors:
6 * Stefan Agner <stefan.agner@toradex.com>
7 *
8 * Based on denali_dt.c
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#include <dm.h>
14#include <linux/io.h>
15#include <linux/ioport.h>
16#include <linux/printk.h>
17
18#include "mxs_nand.h"
19
20struct mxs_nand_dt_data {
21 unsigned int max_ecc_strength_supported;
22};
23
24static const struct mxs_nand_dt_data mxs_nand_imx7d_data = {
25 .max_ecc_strength_supported = 62,
26};
27
28static const struct udevice_id mxs_nand_dt_ids[] = {
29 {
30 .compatible = "fsl,imx7d-gpmi-nand",
31 .data = (unsigned long)&mxs_nand_imx7d_data,
32 },
33 { /* sentinel */ }
34};
35
36static int mxs_nand_dt_probe(struct udevice *dev)
37{
38 struct mxs_nand_info *info = dev_get_priv(dev);
39 const struct mxs_nand_dt_data *data;
40 struct resource res;
41 int ret;
42
43 data = (void *)dev_get_driver_data(dev);
44 if (data)
45 info->max_ecc_strength_supported = data->max_ecc_strength_supported;
46
47 info->dev = dev;
48
49 ret = dev_read_resource_byname(dev, "gpmi-nand", &res);
50 if (ret)
51 return ret;
52
53 info->gpmi_regs = devm_ioremap(dev, res.start, resource_size(&res));
54
55
56 ret = dev_read_resource_byname(dev, "bch", &res);
57 if (ret)
58 return ret;
59
60 info->bch_regs = devm_ioremap(dev, res.start, resource_size(&res));
61
62 info->use_minimum_ecc = dev_read_bool(dev, "fsl,use-minimum-ecc");
63
64 return mxs_nand_init_ctrl(info);
65}
66
67U_BOOT_DRIVER(mxs_nand_dt) = {
68 .name = "mxs-nand-dt",
69 .id = UCLASS_MTD,
70 .of_match = mxs_nand_dt_ids,
71 .probe = mxs_nand_dt_probe,
72 .priv_auto_alloc_size = sizeof(struct mxs_nand_info),
73};
74
75void board_nand_init(void)
76{
77 struct udevice *dev;
78 int ret;
79
80 ret = uclass_get_device_by_driver(UCLASS_MTD,
81 DM_GET_DRIVER(mxs_nand_dt),
82 &dev);
83 if (ret && ret != -ENODEV)
84 pr_err("Failed to initialize MXS NAND controller. (error %d)\n",
85 ret);
86}