wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Support for indirect PCI bridges. |
| 3 | * |
| 4 | * Copyright (C) 1998 Gabriel Paubert. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <common.h> |
| 13 | |
| 14 | #ifdef CONFIG_PCI |
wdenk | 2029f4d | 2002-11-21 23:11:29 +0000 | [diff] [blame] | 15 | #ifndef __I386__ |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 16 | |
| 17 | #include <asm/processor.h> |
| 18 | #include <asm/io.h> |
| 19 | #include <pci.h> |
| 20 | |
| 21 | #define cfg_read(val, addr, type, op) *val = op((type)(addr)) |
| 22 | #define cfg_write(val, addr, type, op) op((type *)(addr), (val)) |
| 23 | |
wdenk | cb99da5 | 2005-01-12 00:15:14 +0000 | [diff] [blame] | 24 | #ifdef CONFIG_IXP425 |
| 25 | extern unsigned char in_8 (volatile unsigned *addr); |
| 26 | extern unsigned short in_le16 (volatile unsigned *addr); |
| 27 | extern unsigned in_le32 (volatile unsigned *addr); |
| 28 | extern void out_8 (volatile unsigned *addr, char val); |
| 29 | extern void out_le16 (volatile unsigned *addr, unsigned short val); |
| 30 | extern void out_le32 (volatile unsigned *addr, unsigned int val); |
| 31 | #endif /* CONFIG_IXP425 */ |
| 32 | |
wdenk | bf2f8c9 | 2003-05-22 22:52:13 +0000 | [diff] [blame] | 33 | #if defined(CONFIG_MPC8260) |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 34 | #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ |
| 35 | static int \ |
| 36 | indirect_##rw##_config_##size(struct pci_controller *hose, \ |
| 37 | pci_dev_t dev, int offset, type val) \ |
| 38 | { \ |
| 39 | out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ |
wdenk | 2853603 | 2003-03-25 16:50:56 +0000 | [diff] [blame] | 40 | sync(); \ |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 41 | cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ |
| 42 | return 0; \ |
| 43 | } |
wdenk | 9c53f40 | 2003-10-15 23:53:47 +0000 | [diff] [blame] | 44 | #elif defined(CONFIG_E500) |
| 45 | #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ |
| 46 | static int \ |
| 47 | indirect_##rw##_config_##size(struct pci_controller *hose, \ |
| 48 | pci_dev_t dev, int offset, type val) \ |
| 49 | { \ |
| 50 | *(hose->cfg_addr) = dev | (offset & 0xfc) | 0x80000000; \ |
| 51 | sync(); \ |
| 52 | cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ |
| 53 | return 0; \ |
| 54 | } |
wdenk | 56ed43e | 2004-02-22 23:46:08 +0000 | [diff] [blame] | 55 | #elif defined(CONFIG_440_GX) |
| 56 | #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ |
| 57 | static int \ |
| 58 | indirect_##rw##_config_##size(struct pci_controller *hose, \ |
| 59 | pci_dev_t dev, int offset, type val) \ |
| 60 | { \ |
| 61 | if (PCI_BUS(dev) > 0) \ |
| 62 | out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000001); \ |
| 63 | else \ |
| 64 | out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ |
| 65 | cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ |
| 66 | return 0; \ |
| 67 | } |
wdenk | 2853603 | 2003-03-25 16:50:56 +0000 | [diff] [blame] | 68 | #else |
| 69 | #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ |
| 70 | static int \ |
| 71 | indirect_##rw##_config_##size(struct pci_controller *hose, \ |
| 72 | pci_dev_t dev, int offset, type val) \ |
| 73 | { \ |
| 74 | out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ |
| 75 | cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ |
| 76 | return 0; \ |
| 77 | } |
| 78 | #endif |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 79 | |
| 80 | #define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask) \ |
| 81 | static int \ |
| 82 | indirect_##rw##_config_##size(struct pci_controller *hose, \ |
| 83 | pci_dev_t dev, int offset, type val) \ |
| 84 | { \ |
| 85 | unsigned int msr = mfmsr(); \ |
| 86 | mtmsr(msr & ~(MSR_EE | MSR_CE)); \ |
| 87 | out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ |
| 88 | cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ |
| 89 | out_le32(hose->cfg_addr, 0x00000000); \ |
| 90 | mtmsr(msr); \ |
| 91 | return 0; \ |
| 92 | } |
| 93 | |
| 94 | INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3) |
| 95 | INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2) |
| 96 | INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0) |
| 97 | #ifdef CONFIG_405GP |
| 98 | INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3) |
| 99 | INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2) |
| 100 | INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0) |
| 101 | #else |
| 102 | INDIRECT_PCI_OP(write, byte, u8, out_8, 3) |
| 103 | INDIRECT_PCI_OP(write, word, u16, out_le16, 2) |
| 104 | INDIRECT_PCI_OP(write, dword, u32, out_le32, 0) |
| 105 | #endif |
| 106 | |
| 107 | void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data) |
| 108 | { |
| 109 | pci_set_ops(hose, |
| 110 | indirect_read_config_byte, |
| 111 | indirect_read_config_word, |
| 112 | indirect_read_config_dword, |
| 113 | indirect_write_config_byte, |
| 114 | indirect_write_config_word, |
| 115 | indirect_write_config_dword); |
| 116 | |
| 117 | hose->cfg_addr = (unsigned int *) cfg_addr; |
| 118 | hose->cfg_data = (unsigned char *) cfg_data; |
| 119 | } |
| 120 | |
| 121 | #endif |
wdenk | 2029f4d | 2002-11-21 23:11:29 +0000 | [diff] [blame] | 122 | #endif |