| Patrick Delaunay | 939d536 | 2018-03-12 10:46:11 +0100 | [diff] [blame] | 1 | |
| 2 | config STM32MP1_DDR | ||||
| 3 | bool "STM32MP1 DDR driver" | ||||
| 4 | depends on DM && OF_CONTROL && ARCH_STM32MP | ||||
| 5 | select RAM | ||||
| 6 | select SPL_RAM if SPL | ||||
| 7 | default y | ||||
| 8 | help | ||||
| 9 | activate STM32MP1 DDR controller driver for STM32MP1 soc | ||||
| 10 | family: support for LPDDR2, LPDDR3 and DDR3 | ||||
| 11 | the SDRAM parameters for controleur and phy need to be provided | ||||
| 12 | in device tree (computed by DDR tuning tools) | ||||