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Wolfgang Denk52744b42013-07-28 22:12:45 +02001/*
Wolfgang Denk815c9672013-09-17 11:24:06 +02002 * SPDX-License-Identifier: GPL-2.0 IBM-pibs
Wolfgang Denk52744b42013-07-28 22:12:45 +02003 *
4 * Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
5 */
wdenk214ec6b2001-10-08 19:18:17 +00006/*----------------------------------------------------------------------------+
7|
wdenk5256def2003-09-18 10:45:21 +00008| File Name: miiphy.h
wdenk214ec6b2001-10-08 19:18:17 +00009|
wdenk5256def2003-09-18 10:45:21 +000010| Function: Include file defining PHY registers.
wdenk214ec6b2001-10-08 19:18:17 +000011|
wdenk5256def2003-09-18 10:45:21 +000012| Author: Mark Wisner
wdenk214ec6b2001-10-08 19:18:17 +000013|
wdenk214ec6b2001-10-08 19:18:17 +000014+----------------------------------------------------------------------------*/
15#ifndef _miiphy_h_
16#define _miiphy_h_
17
Andy Flemingaecf6fc2011-04-08 02:10:27 -050018#include <common.h>
Mike Frysingerd63ee712010-12-23 15:40:12 -050019#include <linux/mii.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050020#include <linux/list.h>
Marian Balakowiczaab8c492005-10-28 22:30:33 +020021#include <net.h>
Andy Flemingaecf6fc2011-04-08 02:10:27 -050022#include <phy.h>
23
24struct legacy_mii_dev {
25 int (*read)(const char *devname, unsigned char addr,
Wolfgang Denk934fcb62011-12-07 08:35:14 +010026 unsigned char reg, unsigned short *value);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050027 int (*write)(const char *devname, unsigned char addr,
Wolfgang Denk934fcb62011-12-07 08:35:14 +010028 unsigned char reg, unsigned short value);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050029};
wdenk214ec6b2001-10-08 19:18:17 +000030
Wolfgang Denk934fcb62011-12-07 08:35:14 +010031int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -050032 unsigned short *value);
Wolfgang Denk934fcb62011-12-07 08:35:14 +010033int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson81b974b2007-10-31 11:21:29 -050034 unsigned short value);
Andy Flemingaea0c3e2011-04-07 14:38:35 -050035int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
Larry Johnson81b974b2007-10-31 11:21:29 -050036 unsigned char *model, unsigned char *rev);
Andy Flemingaea0c3e2011-04-07 14:38:35 -050037int miiphy_reset(const char *devname, unsigned char addr);
38int miiphy_speed(const char *devname, unsigned char addr);
39int miiphy_duplex(const char *devname, unsigned char addr);
40int miiphy_is_1000base_x(const char *devname, unsigned char addr);
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020041#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
Andy Flemingaea0c3e2011-04-07 14:38:35 -050042int miiphy_link(const char *devname, unsigned char addr);
wdenk49c3f672003-10-08 22:33:00 +000043#endif
wdenk214ec6b2001-10-08 19:18:17 +000044
Andy Flemingaea0c3e2011-04-07 14:38:35 -050045void miiphy_init(void);
Marian Balakowiczcbdd1c82005-11-30 18:06:04 +010046
Andy Flemingaea0c3e2011-04-07 14:38:35 -050047void miiphy_register(const char *devname,
48 int (*read)(const char *devname, unsigned char addr,
Wolfgang Denk934fcb62011-12-07 08:35:14 +010049 unsigned char reg, unsigned short *value),
Andy Flemingaea0c3e2011-04-07 14:38:35 -050050 int (*write)(const char *devname, unsigned char addr,
Wolfgang Denk934fcb62011-12-07 08:35:14 +010051 unsigned char reg, unsigned short value));
Marian Balakowiczaab8c492005-10-28 22:30:33 +020052
Andy Flemingaea0c3e2011-04-07 14:38:35 -050053int miiphy_set_current_dev(const char *devname);
54const char *miiphy_get_current_dev(void);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050055struct mii_dev *mdio_get_current_dev(void);
56struct mii_dev *miiphy_get_dev_by_name(const char *devname);
57struct phy_device *mdio_phydev_for_ethname(const char *devname);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020058
Andy Flemingaea0c3e2011-04-07 14:38:35 -050059void miiphy_listdev(void);
Marian Balakowiczaab8c492005-10-28 22:30:33 +020060
Andy Flemingaecf6fc2011-04-08 02:10:27 -050061struct mii_dev *mdio_alloc(void);
Bin Menga961e1f2015-10-07 21:32:37 -070062void mdio_free(struct mii_dev *bus);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050063int mdio_register(struct mii_dev *bus);
Bin Menga961e1f2015-10-07 21:32:37 -070064int mdio_unregister(struct mii_dev *bus);
Andy Flemingaecf6fc2011-04-08 02:10:27 -050065void mdio_list_devices(void);
66
Luigi 'Comio' Mantellini466827e2009-10-10 12:42:20 +020067#ifdef CONFIG_BITBANGMII
68
69#define BB_MII_DEVNAME "bb_miiphy"
70
71struct bb_miiphy_bus {
Mike Frysinger6b300dc2011-11-10 14:11:04 +000072 char name[16];
Luigi 'Comio' Mantellini466827e2009-10-10 12:42:20 +020073 int (*init)(struct bb_miiphy_bus *bus);
74 int (*mdio_active)(struct bb_miiphy_bus *bus);
75 int (*mdio_tristate)(struct bb_miiphy_bus *bus);
76 int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
77 int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
78 int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
79 int (*delay)(struct bb_miiphy_bus *bus);
80#ifdef CONFIG_BITBANGMII_MULTI
81 void *priv;
82#endif
83};
84
85extern struct bb_miiphy_bus bb_miiphy_buses[];
86extern int bb_miiphy_buses_num;
Marian Balakowiczaab8c492005-10-28 22:30:33 +020087
Andy Flemingaea0c3e2011-04-07 14:38:35 -050088void bb_miiphy_init(void);
89int bb_miiphy_read(const char *devname, unsigned char addr,
Larry Johnson81b974b2007-10-31 11:21:29 -050090 unsigned char reg, unsigned short *value);
Andy Flemingaea0c3e2011-04-07 14:38:35 -050091int bb_miiphy_write(const char *devname, unsigned char addr,
Larry Johnson81b974b2007-10-31 11:21:29 -050092 unsigned char reg, unsigned short value);
Luigi 'Comio' Mantellini466827e2009-10-10 12:42:20 +020093#endif
wdenk214ec6b2001-10-08 19:18:17 +000094
95/* phy seed setup */
wdenk5256def2003-09-18 10:45:21 +000096#define AUTO 99
Larry Johnson81b974b2007-10-31 11:21:29 -050097#define _1000BASET 1000
wdenk5256def2003-09-18 10:45:21 +000098#define _100BASET 100
99#define _10BASET 10
100#define HALF 22
101#define FULL 44
wdenk214ec6b2001-10-08 19:18:17 +0000102
103/* phy register offsets */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500104#define MII_MIPSCR 0x11
wdenk214ec6b2001-10-08 19:18:17 +0000105
Mike Frysingerd63ee712010-12-23 15:40:12 -0500106/* MII_LPA */
Larry Johnson81b974b2007-10-31 11:21:29 -0500107#define PHY_ANLPAR_PSB_802_3 0x0001
108#define PHY_ANLPAR_PSB_802_9 0x0002
wdenk656140b2004-04-25 13:18:40 +0000109
Mike Frysingerd63ee712010-12-23 15:40:12 -0500110/* MII_CTRL1000 masks */
Larry Johnson966a80b2007-11-01 08:46:50 -0500111#define PHY_1000BTCR_1000FD 0x0200
112#define PHY_1000BTCR_1000HD 0x0100
113
Mike Frysingerd63ee712010-12-23 15:40:12 -0500114/* MII_STAT1000 masks */
Larry Johnson81b974b2007-10-31 11:21:29 -0500115#define PHY_1000BTSR_MSCF 0x8000
116#define PHY_1000BTSR_MSCR 0x4000
117#define PHY_1000BTSR_LRS 0x2000
118#define PHY_1000BTSR_RRS 0x1000
119#define PHY_1000BTSR_1000FD 0x0800
120#define PHY_1000BTSR_1000HD 0x0400
wdenked2ac4b2004-03-14 18:23:55 +0000121
Larry Johnson966a80b2007-11-01 08:46:50 -0500122/* phy EXSR */
Mike Frysingerd63ee712010-12-23 15:40:12 -0500123#define ESTATUS_1000XF 0x8000
124#define ESTATUS_1000XH 0x4000
Larry Johnson966a80b2007-11-01 08:46:50 -0500125
wdenk214ec6b2001-10-08 19:18:17 +0000126#endif