Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Shengzhou Liu | f13321d | 2014-03-05 15:04:48 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2014 Freescale Semiconductor, Inc. |
Camelia Groza | 6994f3a | 2021-04-13 19:47:57 +0300 | [diff] [blame] | 4 | * Copyright 2021 NXP |
Shengzhou Liu | f13321d | 2014-03-05 15:04:48 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CORENET_DS_H__ |
| 8 | #define __CORENET_DS_H__ |
| 9 | |
Kuldeep Singh | 182ac36 | 2021-08-10 11:20:10 +0530 | [diff] [blame^] | 10 | #define CORTINA_FW_ADDR_IFCNOR 0xefe00000 |
| 11 | #define CORTINA_FW_ADDR_IFCNOR_ALTBANK 0xebe00000 |
| 12 | |
Shengzhou Liu | f13321d | 2014-03-05 15:04:48 +0800 | [diff] [blame] | 13 | void fdt_fixup_board_enet(void *blob); |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 14 | void pci_of_setup(void *blob, struct bd_info *bd); |
Camelia Groza | 6994f3a | 2021-04-13 19:47:57 +0300 | [diff] [blame] | 15 | void fdt_fixup_board_fman_ethernet(void *blob); |
Camelia Groza | ec69c69 | 2021-06-16 17:47:31 +0530 | [diff] [blame] | 16 | void fdt_fixup_board_phy(void *blob); |
Shengzhou Liu | f13321d | 2014-03-05 15:04:48 +0800 | [diff] [blame] | 17 | |
| 18 | #endif |